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Anshul Kumar

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

63

Venues

19

Active years

1980–2024

Best venue rank

A*

Where they publish

Papers

63 indexed papers, newest first.

YearVenueTitleAuthors
2024COMADWhat does your Packet Capture say?Anshul Kumar, Gagan Raj Gupta, Sunny Kumar, Ankita Sahu, Apu Chakraborty
2022DATESACC: Split and Combine Approach to Reduce the Off-chip Memory Accesses of LSTM Accelerators.Saurabh Tewari, Anshul Kumar, Kolin Paul
2022WACVPredStereo: An Accurate Real-time Stereo Vision System.Diksha Moolchandani, Nivedita Shrivastava, Anshul Kumar, Smruti R. Sarangi
2021VLSIDGame Theory-Based Parameter-Tuning for Path Planning of UAVs.Diksha Moolchandani, Geesara Prathap, Ilya Afanasyev, Anshul Kumar, Manuel Mazzara, Smruti R. Sarangi
2020ISPASSPerformance Prediction for Multi-Application Concurrency on GPUs.Diksha Moolchandani, Sudhanshu Gupta, Anshul Kumar, Smruti R. Sarangi
2016VTSImpact of crosstalk and process variation on capture power reduction for at-speed test.Surya Piplani, G. S. Visweswaran, Anshul Kumar
2013ISCASHigh performance 3D-FFT implementation.U. Nidhi, Kolin Paul, Ahmed Hemani, Anshul Kumar
2011FDLA UML based framework for efficient validation of TLM 2 models.Vaibhav Jain, Anshul Kumar, Preeti Ranjan Panda
2011IPINStrap-down Pedestrian Dead-Reckoning system.Pragun Goyal, Vinay J. Ribeiro, Huzur Saran, Anshul Kumar
2010ASPDACA high-level synthesis flow for custom instruction set extensions for application-specific processors.Nagaraju Pothineni, Philip Brisk, Paolo Ienne, Anshul Kumar, Kolin Paul
2010VLSIDInstruction Selection in ASIP Synthesis Using Functional Matching.Nidhi Arora, Kiran Chandramohan, Nagaraju Pothineni, Anshul Kumar
2010VLSIDFront-End Design Flows for Systems on Chip: An Embedded Tutorial.Anshul Kumar, Preeti Ranjan Panda
2009ICDCNAn Index-Based Mobile Checkpointing and Recovery Algorithm.Awadhesh Kumar Singh, Rohit Bhat, Anshul Kumar
2008VLSIDExhaustive Enumeration of Legal Custom Instructions for Extensible Processors.Nagaraju Pothineni, Anshul Kumar, Kolin Paul
2008VLSIDA Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions.Nagaraju Pothineni, Anshul Kumar, Kolin Paul
2007VLSIDPower Reduction in VLIW Processor with Compiler Driven Bypass Network.Neeraj Goel, Anshul Kumar, Preeti Ranjan Panda
2007VLSIDApplication Specific Datapath Extension with Distributed I/O Functional Units.Nagaraju Pothineni, Anshul Kumar, Kolin Paul
2006RSPRapid Resource-Constrained Hardware Performance Estimation.Basant Kumar Dwivedi, Arun Kejariwal, M. Balakrishnan, Anshul Kumar
2005DATEEvaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures.Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda, Anshul Kumar
2005VLSIDIntegrated On-Chip Storage Evaluation in ASIP Synthesis.Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
2005VLSIDBattery Model for Embedded Systems.Venkat Rao, Gaurav Singhal, Anshul Kumar, Nicolas Navet
2004VLSIDSynthesis of Application Specific Multiprocessor Architectures for Process Networks.Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishnan
2004VLSIDReal Time Dynamic Voltage Scaling For Embedded Systems.Venkat Rao, Gaurav Singhal, Anshul Kumar
2004VLSIDPerformance Analysis of Inter Cluster Communication Methods in VLIW Architecture.Sourabh Saluja, Anshul Kumar
2004SCOPESAutomatically Customising VLIW Architectures with Coarse Grained Application-Specific Functional Units.Diviya Jain, Anshul Kumar, Laura Pozzi, Paolo Ienne
2003DSDExploring Storage Organization in ASIP Synthesis.Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
2003VLSIDDesign of a 2D DCT/IDCT application specific VLIW processor supporting scaled and sub-sampled blocks.Rohini Krishnan, Om Prakash Gangwal, Jos T. J. van Eijndhoven, Anshul Kumar
2003VLSIDSoC Synthesis with Automatic Hardware Software Interface Generation.Amarjeet Singh, Amit Chhabra, Anup Gangwar, Basant Kumar Dwivedi, M. Balakrishnan, Anshul Kumar
2002CASESAn efficient technique for exploring register file size in ASIP synthesis.Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
2002VLSIDExploring the Number of Register Windows in ASIP Synthesis.Vishal P. Bhatt, M. Balakrishnan, Anshul Kumar
2002VLSIDA New Divide and Conquer Method for Achieving High Speed Division in Hardware.Murali Mohan, Rohini Krishnan, Anshul Kumar, M. Balakrishnan
2002RSPHybrid Multi-FPGA Board Evaluation by Limiting Multi-Hop Routing.Sushil Chandra Jain, Anshul Kumar, Shashi Kumar
2001VLSIDSynthesizing A Long Latency Unit Within Vliw Processor.Ram Lakhan Gupta, Anshul Kumar, Albert van der Werf, Natalino G. Bus
2001VLSIDASIP Design Methodologies : Survey and Issues.Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar
2001VLSIDIntegrating Communication Cost Estimation in Embedded Systems Design : A PCI Case Study.Anupam Rastogi, M. Balakrishnan, Anshul Kumar
2000FPLEfficient Embedding of Partitioned Circuits onto Multi-FPGA Boards.Sushil Chandra Jain, Anshul Kumar, Shashi Kumar
2000VLSIDEvaluation of Various Routing Architectures for Multi-FPGA Boards.Sushil Chandra Jain, Shashi Kumar, Anshul Kumar
2000VLSIDnterface Synthesis: Issues and Approaches.Arvind Rajawat, M. Balakrishnan, Anshul Kumar
1998DATEScheduling of Outputs in Grammar-based Hardware Synthesis of Data Communication Protocols.Johnny berg, Ahmed Hemani, Anshul Kumar
1998VLSIDHybrid Testing Schemes Based on Mutual and Signature Testing.Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar
1998VLSIDOn-Chip Signature Checking for Embedded Memories.Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar
1998VLSIDSpeeding Up Program Execution Using Reconfigurable Hardware and a Hardware Function Library.Sitanshu Jain, M. Balakrishnan, Anshul Kumar, Shashi Kumar
1998VLSIDAn Object-Oriented Concept for Intelligent Library Functions.Johnny berg, Axel Jantsch, Anshul Kumar
1997DATEA scheme for multiple on-chip signature checking for embedded SRAMs.Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar
1997VLSIDEfficient Implementation of Multiple On-Chip Signature Checking.Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar
1997VLSIDOptimal Clock Period for Synthesized Data Paths.A. R. Naseer, M. Balakrishnan, Anshul Kumar
1996VLSIDA Novel BIST Architecture With Built-in Self Check.Mohammed Fadle Abdulla, C. P. Ravikumar, Anshul Kumar
1996VLSIDA multiplier generator for Xilinx FPGAs.Jaswinder Pal Singh, Anshul Kumar, Shashi Kumar
1995FPLDelay Minimal Mapping of RTL Structures onto LUT Based FPGAs.A. R. Naseer, M. Balakrishnan, Anshul Kumar
1995VLSIDHeuristic search based approach to scheduling, allocation and binding in Data Path Synthesis.Alok Kumar, Anshul Kumar, M. Balakrishnan
1995VLSIDAn HOL based framework for design of correct high level synthesizers.B. M. Subraya, Anshul Kumar, Shashi Kumar
1995RSPCircuit partitioning with partial order for mixed simulation emulation environment.Gurmeet Singh Manku, Anshul Kumar, Shashi Kumar
1994FPLAn Efficient Technique for Mapping RTL Structures onto FPGAs.A. R. Naseer, M. Balakrishnan, Anshul Kumar
1994VLSIDFAST: FPGA Targeted RTL Structure Synthesis Technique.A. R. Naseer, M. Balakrishnan, Anshul Kumar
1993VLSIDHigh Level Design Experiences with IDEAS.C. S. Ajay, M. Balakrishnan, D. Harikrishna, M. Karunakaran, Anshul Kumar, Shashi Kumar, V. Mudgil, A. R. Naseer
1993VLSIDDESSERT: Design Space Exploration of RT Level Components.M. V. Rao, M. Balakrishnan, Anshul Kumar
1992VLSIDA Partitioning Scheme For Multiple Pla Based Control Part Synthesis In Ideas.Manu Lauria, Shashi Kumar, Anshul Kumar
1992VLSIDData Path Synthesis With Global Time Constraint.Prashant P. Nedungadi, M. Balakrishnan, Anshul Kumar
1989DACAutomatic Synthesis of Microprogrammed Control Units from Behavioral Descriptions.Anshul Kumar, Shashi Kumar, P. Kulshreshtha, Sudipto Ghose
1985DACAutomatic generation of digital system schematic diagrams.Anjali Arya, Anshul Kumar, V. V. Swaminathan, Amit Misra
1985DACAn automated data path synthesizer for a canonic structure, implementable in VLSI.Kumar Ramayya, Anshul Kumar, Surendra Prasad
1984ICASSPRecognition of consonants using an ARMA model of the speech signal.Anshul Kumar, George A. Bekey
1980ISCAA Structured Language for CAD of Digital Systems.Anshul Kumar, P. C. P. Bhatt