| 2018 | IOLTS | ESIFT: Efficient System for Error Injection. | Ninghan Tian, Daniel G. Saab, Jacob A. Abraham |
| 2015 | FPGA | Formal Verification ATPG Search Engine Emulator (Abstract Only). | Gregory Ford, Aswin Krishna, Jacob A. Abraham, Daniel G. Saab |
| 2012 | ICCAD | Ultra-low power NEMS FPGA. | Sijing Han, Vijay Sirigiri, Daniel G. Saab, Massood Tabib-Azar |
| 2010 | FPL | Ultra-low-Power Ultra-fast Hybrid CNEMS-CMOS FPGA. | Vijay K. Sirigir, Khawla Alzoubi, Daniel G. Saab, Fatih Kocan, Massood Tabib-Azar |
| 2007 | ASPDAC | Ultralow-Power Reconfigurable Computing with Complementary Nano-Electromechanical Carbon Nanotube Switches. | Swarup Bhunia, Massood Tabib-Azar, Daniel G. Saab |
| 2007 | ETS | Automatic Generation of Instructions to Robustly Test Delay Defects in Processors. | Sankar Gurumurthy, Ramtilak Vemu, Jacob A. Abraham, Daniel G. Saab |
| 2007 | VLSID | Tutorial T4A: Formal Verification Techniques and Tools for Complex Designs. | Jacob A. Abraham, Daniel G. Saab |
| 2006 | ITC | HDL Program Slicing to Reduce Bounded Model Checking Search Overhead. | Jen-Chieh Ou, Daniel G. Saab, Jacob A. Abraham |
| 2006 | VLSID | Checking Nested Properties Using Bounded Model Checking and Sequential ATPG. | Qiang Qiang, Daniel G. Saab, Jacob A. Abraham |
| 2005 | FPL | An Emulation Model for Sequential ATPG-Based Bounded Model Checking. | Qiang Qiang, Daniel G. Saab, Jacob A. Abraham |
| 2005 | ICCD | Case Study of ATPG-based Bounded Model Checking: Verifying USB2.0 IP Core. | Qiang Qiang, Chia-Lun Chang, Daniel G. Saab, Jacob A. Abraham |
| 2003 | VLSID | Formal Verification Using Bounded Model Checking: SAT versus Sequential ATPG Engines. | Daniel G. Saab, Jacob A. Abraham, Vivekananda M. Vedula |
| 2002 | FPL | Massively Parallel/Reconfigurable Emulation Model for the D-algorithm. | Daniel G. Saab, Fatih Kocan, Jacob A. Abraham |
| 2002 | ITC | Verifying Properties Using Sequential ATPG. | Jacob A. Abraham, Vivekananda M. Vedula, Daniel G. Saab |
| 2000 | VLSID | Hierarchical Test Generation for Systems On a Chip. | Raghuram S. Tupuri, Jacob A. Abraham, Daniel G. Saab |
| 1999 | DAC | A Massively-Parallel Easily-Scalable Satisfiability Solver Using Reconfigurable Hardware. | Miron Abramovici, Jos T. de Sousa, Daniel G. Saab |
| 1999 | DAC | Dynamic Fault Diagnosis on Reconfigurable Hardware. | Fatih Kocan, Daniel G. Saab |
| 1999 | ICCAD | Concurrent D-algorithm on reconfigurable hardware. | Fatih Kocan, Daniel G. Saab |
| 1998 | ICCD | Dynamic fault diagnosis for sequential circuits on reconfigurable hardware. | Fatih Kocan, Daniel G. Saab |
| 1997 | FPL | Satisfiability on reconfigurable hardware. | Miron Abramovici, Daniel G. Saab |
| 1996 | VTS | Initialization of sequential circuits and its application to ATPG. | Jalal A. Wehbeh, Daniel G. Saab |
| 1995 | ITC | DFT & ATPG: Together Again. | Ben Mathew, Daniel G. Saab |
| 1994 | ICCAD | Iterative [simulation-based genetics + deterministic techniques]= complete ATPG0. | Daniel G. Saab, Youssef Saab, Jacob A. Abraham |
| 1994 | ITC | On the Initialization of Sequential Circuits. | Jalal A. Wehbeh, Daniel G. Saab |
| 1993 | ICCAD | Fault behavior dictionary for simulation of device-level transients. | Gwan S. Choi, Ravishankar K. Iyer, Daniel G. Saab |
| 1993 | ICCAD | Augmented partial reset. | Ben Mathew, Daniel G. Saab |
| 1993 | ICPP | Assigning Sites fto Redundant Clusters in a Distributed Storage System. | Antoine N. Mourad, W. Kent Fuchs, Daniel G. Saab |
| 1993 | ICPP | Performance of Redundant Disk Array Organizations in Transaction Processing Environments. | Antoine N. Mourad, W. Kent Fuchs, Daniel G. Saab |
| 1993 | ITC | On Selecting Flip-Flops for Partial Reset. | Miron Abramovici, Prashant S. Parikh, Ben Mathew, Daniel G. Saab |
| 1993 | ITC | CHEETA: Composition of Hierarchical Sequential Tests Using ATKET. | Praveen Vishakantaiah, Jacob A. Abraham, Daniel G. Saab |
| 1992 | ICCAD | Behavioral synthesis for testability. | Chung-Hsing Chen, Daniel G. Saab |
| 1992 | ICCAD | CRIS: a test cultivation program for sequential VLSI circuits. | Daniel G. Saab, Youssef Saab, Jacob A. Abraham |
| 1992 | ICCD | Hierarchical Simulation of MOS Circuits Using Extracted Functional Models. | Jalal A. Wehbeh, Daniel G. Saab |
| 1992 | ICDE | Database Recovery Using Redundant Disk Arrays. | Antoine N. Mourad, W. Kent Fuchs, Daniel G. Saab |
| 1992 | VTS | Robust switch-level test generation. | Ben Mathew, Daniel G. Saab |
| 1991 | ICCAD | BETA: Behavioral Testability Analysis. | Chung-Hsing Chen, Chienwen Wu, Daniel G. Saab |
| 1991 | ICCD | Accessibility Analysis on Data Flow Graph: An Approach to Design for Testability. | Chung-Hsing Chen, Chienwen Wu, Daniel G. Saab |
| 1991 | VTS | Fault modeling and testing of self-timed circuits. | Stanford S. Guillory, Daniel G. Saab, Andrew T. Yang |
| 1990 | ICCAD | SNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction. | David T. Blaauw, Robert B. Mueller-Thuns, Daniel G. Saab, Prithviraj Banerjee, Jacob A. Abraham |
| 1990 | ICCD | Fault grading of large digital systems. | Daniel G. Saab, Robert B. Mueller-Thuns, David T. Blaauw, Joseph T. Rahmeh, Jacob A. Abraham |
| 1990 | SC | Design of a scalable parallel switch-level simulator for VLSI. | Robert B. Mueller-Thuns, Daniel G. Saab, Jacob A. Abraham |
| 1989 | DAC | Automatic Generation of Behavioral Models from Switch-Level Descriptions. | David T. Blaauw, Daniel G. Saab, Robert B. Mueller-Thuns, Jacob A. Abraham, Joseph T. Rahmeh |
| 1989 | ICCAD | Portable parallel logic and fault simulation. | Robert B. Mueller-Thuns, Daniel G. Saab, Robert F. Damiano, Jacob A. Abraham |
| 1989 | ICCD | Parallel-concurrent fault simulation. | Daniel G. Saab, Ibrahim N. Hajj, Joseph T. Rahmeh |
| 1988 | DAC | Delay Modeling and Time of Bipolar Digital Circuits. | Daniel G. Saab, Andrew T. Yang, Ibrahim N. Hajj |
| 1988 | ICCAD | CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits. | Daniel G. Saab, Robert B. Mueller-Thuns, David T. Blaauw, Jacob A. Abraham, Joseph T. Rahmeh |