| 2016 | VLSID | Memristor Based Arbiter PUF: Cryptanalysis Threat and Its Mitigation. | Urbi Chatterjee, Rajat Subhra Chakraborty, Jimson Mathew, Dhiraj K. Pradhan |
| 2014 | DATE | A low power and robust carbon nanotube 6T SRAM design with metallic tolerance. | Luo Sun, Jimson Mathew, Rishad A. Shafik, Dhiraj K. Pradhan, Zhen Li |
| 2014 | DATE | Complementary resistive switch based stateful logic operations using material implication. | Yuanfan Yang, Jimson Mathew, Dhiraj K. Pradhan, Marco Ottavi, Salvatore Pontarelli |
| 2014 | IOLTS | A hybrid reliability assessment method and its support of sequential logic modelling. | Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-Franois Naviner, Dhiraj K. Pradhan |
| 2014 | IOLTS | A placement strategy for reducing the effects of multiple faults in digital circuits. | Samuel N. Pagliarini, Dhiraj K. Pradhan |
| 2013 | DATE | A fast and Effective DFT for test and diagnosis of power switches in SoCs. | Xiaoyu Huang, Jimson Mathew, Rishad A. Shafik, Subhasis Bhattacharjee, Dhiraj K. Pradhan |
| 2013 | DSD | Software Modification Aided Transient Error Tolerance for Embedded Systems. | Rishad A. Shafik, Gerard K. Rauwerda, Jordy Potman, Kim Sunesen, Dhiraj K. Pradhan, Jimson Mathew, Ioannis Sourdis |
| 2012 | DSD | The DeSyRe Project: On-Demand System Reliability. | Ioannis Sourdis, Christos Strydis, Christos-Savvas Bouganis, Babak Falsafi, Georgi Nedeltchev Gaydadjiev, Alirad Malek, R. Mariani, Dionisios N. Pnevmatikatos, Dhiraj K. Pradhan, Gerard K. Rauwerda, Kim Sunesen, Stavros Tzilis |
| 2011 | VLSID | Variation-Aware TED-Based Approach for Nano-CMOS RTL Leakage Optimization. | Shibaji Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty, Maciej J. Ciesielski |
| 2010 | ASPDAC | A novel si-tunnel FET based SRAM design for ultra low-power 0.3V V | Jawar Singh, Krishnan Ramakrishnan, Saurabh Mookerjea, Suman Datta, Narayanan Vijaykrishnan, Dhiraj K. Pradhan |
| 2010 | DATE | Investigating the impact of NBTI on different power saving cache strategies. | Andrew J. Ricketts, Jawar Singh, Krishnan Ramakrishnan, Narayanan Vijaykrishnan, Dhiraj K. Pradhan |
| 2010 | PERCOM | Fault diagnosis in multi layered De Bruijn based architectures for sensor networks. | Anas Abu Taleb, Jimson Mathew, Dhiraj K. Pradhan |
| 2010 | VLSID | A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM. | Garima Thakral, Saraju P. Mohanty, Dhruva Ghai, Dhiraj K. Pradhan |
| 2009 | DATE | Single ended 6T SRAM with isolated read-port for low-power embedded systems. | Jawar Singh, Dhiraj K. Pradhan, Simon Hollis, Saraju P. Mohanty, Jimson Mathew |
| 2009 | IOLTS | A fast error correction technique for matrix multiplication algorithms. | Costas Argyrides, Carlos Arthur Lang Lisba, Dhiraj K. Pradhan, Luigi Carro |
| 2009 | IOLTS | C-testable S-box implementation for secure advanced encryption standard. | Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan |
| 2009 | VLSID | Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems. | Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan |
| 2008 | DATE | De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs. | Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimson Mathew, Dhiraj K. Pradhan |
| 2008 | IOLTS | Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement. | Costas Argyrides, Fabian Vargas, Marlon Moraes, Dhiraj K. Pradhan |
| 2008 | IOLTS | Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line Single Error Correction and Double Error Detection. | Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan |
| 2008 | IOLTS | Fault Tolerant Reversible Finite Field Arithmetic Circuits. | Jimson Mathew, Jawar Singh, Anas Abu Taleb, Dhiraj K. Pradhan |
| 2008 | ISCAS | Fault tolerant bit parallel finite field multipliers using LDPC codes. | Jimson Mathew, Jawar Singh, Abusaleh M. Jabir, Mohammad Hosseinabady, Dhiraj K. Pradhan |
| 2008 | ISCAS | A nano-CMOS process variation induced read failure tolerant SRAM cell. | Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan |
| 2008 | VLSID | Single Error Correcting Finite Field Multipliers Over GF(2m). | Jimson Mathew, Costas Argyrides, Abusaleh M. Jabir, Hafizur Rahaman, Dhiraj K. Pradhan |
| 2008 | VLSID | Design of Reversible Finite Field Arithmetic Circuits with Error Detection. | Jimson Mathew, Hafizur Rahaman, Babita R. Jose, Dhiraj K. Pradhan |
| 2008 | VLSID | A Galois Field Based Logic Synthesis Approach with Testability. | Jimson Mathew, Hafizur Rahaman, Ashutosh Kumar Singh, Abusaleh M. Jabir, Dhiraj K. Pradhan |
| 2008 | VTS | Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms. | Carlos Arthur Lang Lisba, Costas Argyrides, Dhiraj K. Pradhan, Luigi Carro |
| 2007 | CIT | Single Event Upset Detection and Correction. | Jawar Singh, Jimson Mathew, Mohammad Hosseinabady, Dhiraj K. Pradhan |
| 2007 | IOLTS | Highly Reliable Power Aware Memory Design. | Costas Argyrides, Dhiraj K. Pradhan |
| 2007 | IOLTS | Efficient Testable Bit Parallel Multipliers over GF(2^m) with Constant Test set. | Jimson Mathew, Hafizur Rahaman, Dhiraj K. Pradhan |
| 2007 | ISCAS | Multiple Upsets Tolerance in SRAM Memory. | Costas Argyrides, Hamid R. Zarandi, Dhiraj K. Pradhan |
| 2007 | ISCAS | On the Hardware Reduction of z-Datapath of Vectoring CORDIC. | R. Stapenhurst, Koushik Maharatna, Jimson Mathew, Jos L. Nez-Yez, Dhiraj K. Pradhan |
| 2007 | ISCAS | CLB-based Detection and Correction of Bit-flip faults in SRAM-based FPGAs. | Hamid R. Zarandi, Seyed Ghassem Miremadi, Costas Argyrides, Dhiraj K. Pradhan |
| 2007 | ISCAS | Soft Error Mitigation in Switch Modules of SRAM-based FPGAs. | Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew |
| 2007 | ISCAS | CAD-Directed SEU Susceptibility Reduction in FPGA Circuits Designs. | Hamid R. Zarandi, Seyed Ghassem Miremadi, Dhiraj K. Pradhan, Jimson Mathew |
| 2007 | VLSID | Constant Function Independent Test Set for Fault Detection in Bit Parallel Multipliers in GF(2^m). | Hafizur Rahaman, Jimson Mathew, Dhiraj K. Pradhan |
| 2007 | VTS | Transition Fault Testability in Bit Parallel Multipliers over GF(2^{m}). | Hafizur Rahaman, Jimson Mathew, Biplab K. Sikdar, Dhiraj K. Pradhan |
| 2006 | DATE | Reuse-based test access and integrated test scheduling for network-on-chip. | Chunsheng Liu, Zach Link, Dhiraj K. Pradhan |
| 2006 | ICCAD | An efficient technique for synthesis and optimization of polynomials in GF(2 | Abusaleh M. Jabir, Dhiraj K. Pradhan, Jimson Mathew |
| 2006 | VTS | Thermal-Aware Testing of Network-on-Chip Using Multiple-Frequency Clocking. | Chunsheng Liu, Vikram Iyengar, Dhiraj K. Pradhan |
| 2005 | IOLTS | A Hamming Distance Based Test Pattern Generator with Improved Fault Coverage. | Dhiraj K. Pradhan, Dimitri Kagaris, Rohit Gambhir |
| 2005 | ITC | Comparative study of CA with phase shifters and GLFSRs. | S. Chidambaram, Dimitrios Kagaris, Dhiraj K. Pradhan |
| 2005 | VLSID | Recent Advances in Verification, Equivalence Checking and SAT-Solvers. | Dhiraj K. Pradhan, Magdy S. Abadir, Mauricio Varea |
| 2004 | ASPDAC | LPRAM: a low power DRAM with testability. | Subhasis Bhattacharjee, Dhiraj K. Pradhan |
| 2004 | DATE | MODD: A New Decision Diagram and Representation for Multiple Output Binary Functions. | Abusaleh M. Jabir, Dhiraj K. Pradhan |
| 2004 | ITC | Test Scheduling for Network-on-Chip with BIST and Precedence Constraints. | Chunsheng Liu, Hamid Sharif, rika F. Cota, Dhiraj K. Pradhan |
| 2004 | SAT | NiVER: Non Increasing Variable Elimination Resolution for Preprocessing SAT instances. | Sathiamoorthy Subbarayan, Dhiraj K. Pradhan |
| 2004 | SAT | NiVER: Non-increasing Variable Elimination Resolution for Preprocessing SAT Instances. | Sathiamoorthy Subbarayan, Dhiraj K. Pradhan |
| 2003 | DATE | EBIST: A Novel Test Generator with Built-In Fault Detection Capability. | Dhiraj K. Pradhan, Chunsheng Liu, Krishnendu Chakrabarty |
| 2003 | ISCAS | Wormhole routing in de Bruijn networks and hyper-de Bruijn networks. | Elango Ganesan, Dhiraj K. Pradhan |
| 2001 | IOLTS | Logic Insertion to Speed-Up Logic Verification: A Recent Development. | Dhiraj K. Pradhan |
| 2001 | VTS | ATPG for Design Errors-Is It Possible? | Magdy S. Abadir, Scott Davidson, Vijay Nagasamy, Dhiraj K. Pradhan, Prab Varma |
| 1997 | ICDCS | Improving Performance of TCP over Wireless Networks. | Bikram S. Bakshi, P. Krishna, Nitin H. Vaidya, Dhiraj K. Pradhan |
| 1996 | ICCAD | Sequential redundancy identification using recursive learning. | Wanlin Cao, Dhiraj K. Pradhan |
| 1996 | ICCAD | VERILAT: verification using logic augmentation and transformations. | Dhiraj K. Pradhan, Debjyoti Paul, Mitrajit Chatterjee |
| 1996 | ISLPED | Gate-level synthesis for low-power using new transformations. | Dhiraj K. Pradhan, Mitrajit Chatterjee, Madhu V. Swarna, Wolfgang Kunz |
| 1996 | LCN | Providing Seamless Communication in Mobile Wireless Networks. | Bikram S. Bakshi, P. Krishna, Dhiraj K. Pradhan, Nitin H. Vaidya |
| 1995 | DAC | Novel Verification Framework Combining Structural and OBDD Methods in a Synthesis Environment. | Subodh M. Reddy, Wolfgang Kunz, Dhiraj K. Pradhan |
| 1995 | ICCAD | LOT: logic optimization with testability-new transformations using recursive learning. | Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang Kunz |
| 1995 | INFOCOM | Modified Tree Structure for Location Management in Mobile Environments. | Shlomi Dolev, Dhiraj K. Pradhan, Jennifer L. Welch |
| 1995 | VTS | A novel pattern generator for near-perfect fault-coverage. | Mitrajit Chatterjee, Dhiraj K. Pradhan |
| 1994 | ICCD | Initialization Isuues in the Synthesis of Asynchronous Circuits. | Savita Banerjee, Rabindra K. Roy, Srimat T. Chakradhar, Dhiraj K. Pradhan |
| 1994 | ICPP | Recovery in Multicomputers with Finite Error Detection Latency. | P. Krishna, Nitin H. Vaidya, Dhiraj K. Pradhan |
| 1994 | ICPP | Subcube Level Time-Sharing in Hypercube Multicomputers. | Debendra Das Sharma, G. D. Holland, Dhiraj K. Pradhan |
| 1994 | ICPP | Job Scheduling in Mesh Multicomputers. | Debendra Das Sharma, Dhiraj K. Pradhan |
| 1994 | ISCAS | Bit-Serial Generalized Median Filters. | Barun K. Kar, Khadem M. Yusuf, Dhiraj K. Pradhan |
| 1994 | ITC | GLFSR - A New Test Pattern Generator for Built-In Self-Test. | Dhiraj K. Pradhan, Mitrajit Chatterjee |
| 1994 | VLSID | Synthesis of Initializable Asynchronous Circuits. | Srimat T. Chakradhar, Savita Banerjee, Rabindra K. Roy, Dhiraj K. Pradhan |
| 1994 | VTS | Functional learning: a new approach to learning in digital circuits. | Rajarshi Mukherjee, Jawahar Jain, Dhiraj K. Pradhan |
| 1993 | ICCAD | Buffer assignment for data driven architectures. | Dhiraj K. Pradhan, Mitrajit Chatterjee, Savita Banerjee |
| 1993 | ICCD | Desgin for Testability of Asynchronous Sequential Circuits. | Jayashree Saxena, Dhiraj K. Pradhan |
| 1993 | ICDCS | Degradable Agreement in the Presence of Byzantine Faults. | Nitin H. Vaidya, Dhiraj K. Pradhan |
| 1993 | ICPP | Fast and Efficient Strategies for Cubic and Non-Cubic Allocation in Hypercube Multiprocessors. | Debendra Das Sharma, Dhiraj K. Pradhan |
| 1993 | ITC | A Method to Derive Compact Test Sets for Path Delay Faults in Combinational Circuits. | Jayashree Saxena, Dhiraj K. Pradhan |
| 1992 | ITC | Can Concurrent Checkers Help BIST? | Sandeep K. Gupta, Dhiraj K. Pradhan |
| 1992 | ITC | Recursive Learning: An Attractive Alternative to the Decision Tree for Test Genration in Digital Circuits. | Wolfgang Kunz, Dhiraj K. Pradhan |
| 1992 | VTS | A design for testability scheme to reduce test application time in full scan. | Dhiraj K. Pradhan, Jayashree Saxena |
| 1991 | ICDCS | The hyper-deBruijn multiprocessor networks. | Elango Ganesan, Dhiraj K. Pradhan |
| 1991 | ITC | Aliasing and Diagnosis Probability in MISR and STUMPS Using a General Error Model. | Mark G. Karpovsky, Sandeep K. Gupta, Dhiraj K. Pradhan |
| 1991 | SC | A virtual memory translation mechanism to support checkpoint and rollback recovery. | Nicholas S. Bowen, Dhiraj K. Pradhan |
| 1990 | ICPP | Modeling of Live Lines and True Sharing in Multi-Cache Memory Systems. | Abraham Mendelson, Dominique Thibaut, Dhiraj K. Pradhan |
| 1988 | ITC | A New Framework for Designing and Analyzing BIST Techniques: Computation of Exact Aliasing Probability. | Sandeep K. Gupta, Dhiraj K. Pradhan |
| 1988 | ITC | RTRAM: Reconfigurable and Testable Multi-Bit RAM Design. | Dhiraj K. Pradhan, Nirmala R. Kamath |
| 1987 | ISCA | Organization and Analysis of a Gracefully-Degrading Interleaved Memory System. | Kifung C. Cheung, Gurindar S. Sohi, Kewal K. Saluja, Dhiraj K. Pradhan |
| 1985 | ISCA | The de Bruijn Multiprocessor Network: A Versatile Sorting Network. | Maheswara R. Samatham, Dhiraj K. Pradhan |
| 1984 | ISCA | A Multiprocessor Network Suitable for Single-Chip VLSI Implementation. | Maheswara R. Samatham, Dhiraj K. Pradhan |
| 1982 | ICDCS | On a Class of Fault-Tolerant Multiprocessor Network Architectures. | Dhiraj K. Pradhan |
| 1981 | ITC | Completely Self-Checking Checkers in PLAs. | Kyushik Son, Dhiraj K. Pradhan |