| 2018 | DAC | RAIN: a tool for reliability assessment of interconnect networks - physics to software. | Ali Abbasinasab, Malgorzata Marek-Sadowska |
| 2016 | ICCAD | An efficient and accurate algorithm for computing RC current response with applications to EM reliability evaluation. | Zhong Guan, Malgorzata Marek-Sadowska |
| 2016 | ICCAD | Making split-fabrication more secure. | Ping-Lin Yang, Malgorzata Marek-Sadowska |
| 2016 | ICCD | A fast, fully verifiable, and hardware predictable ASIC design methodology. | Ping-Lin Yang, Malgorzata Marek-Sadowska |
| 2014 | DAC | System-Level Floorplan-Aware Analysis of Integrated CPU-GPUs. | Vivek S. Nandakumar, Malgorzata Marek-Sadowska |
| 2012 | DAC | Can pin access limit the footprint scaling? | Xiang Qiu, Malgorzata Marek-Sadowska |
| 2011 | ASPDAC | Rapid layout pattern classification. | Jen-Yi Wuu, Fedor G. Pikus, Andres J. Torres, Malgorzata Marek-Sadowska |
| 2011 | DAC | Layout effects in fine grain 3D integrated regular microprocessor blocks. | Vivek S. Nandakumar, Malgorzata Marek-Sadowska |
| 2011 | ICCAD | Variation-aware electromigration analysis of power/ground networks. | Di-An Li, Malgorzata Marek-Sadowska |
| 2011 | ICCD | Low power, high throughput network-on-chip fabric for 3D multicore processors. | Vivek S. Nandakumar, Malgorzata Marek-Sadowska |
| 2009 | ISLPED | Electromigration study of power-gated grids. | Aida Todri, Malgorzata Marek-Sadowska |
| 2008 | DAC | Power gating scheduling for power/ground noise reduction. | Hailin Jiang, Malgorzata Marek-Sadowska |
| 2008 | ICCAD | Power supply noise aware workload assignment for multi-core systems. | Aida Todri, Malgorzata Marek-Sadowska, Joseph N. Kozhaya |
| 2008 | ICCD | Is there always performance overhead for regular fabric? | Yi-Wei Lin, Malgorzata Marek-Sadowska, Wojciech Maly, Andrzej Pfitzner, Dominik Kasprowicz |
| 2008 | ICCD | ECO-Map: Technology remapping for post-mask ECO using simulated annealing. | Nilesh Modi, Malgorzata Marek-Sadowska |
| 2008 | ICCD | A study of reliability issues in clock distribution networks. | Aida Todri, Malgorzata Marek-Sadowska |
| 2008 | ICCD | Timing analysis considering IR drop waveforms in power gating designs. | Shih-Hung Weng, Yu-Min Kuo, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2007 | DAC | OPC-Free and Minimally Irregular IC Design Style. | Wojciech Maly, Yi-Wei Lin, Malgorzata Marek-Sadowska |
| 2007 | DAC | An Efficient Mechanism for Performance Optimization of Variable-Latency Designs. | Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2007 | ICCAD | Engineering change using spare cells with constant insertion. | Yu-Min Kuo, Ya-Ting Chang, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2007 | ICCAD | Analysis and optimization of power-gated ICs with multiple power gating configurations. | Aida Todri, Malgorzata Marek-Sadowska, Shih-Chieh Chang |
| 2007 | ISLPED | Electromigration and voltage drop aware power grid optimization for power gated ICs. | Aida Todri, Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 2006 | ICCD | Power/ground supply network optimization for power-gating. | Hailin Jiang, Malgorzata Marek-Sadowska |
| 2006 | ITC | Timing Defect Diagnosis in Presence of Crosstalk for Nanometer Technology. | Vishal J. Mehta, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
| 2005 | FPGA | Skew-programmable clock design for FPGA and skew-aware placement. | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
| 2005 | ICCAD | Via-configurable routing architectures and fast design mappability estimation for regular fabrics. | Yajun Ran, Malgorzata Marek-Sadowska |
| 2005 | ICCAD | Timing-aware power noise reduction in layout. | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
| 2005 | ICCD | Benefits and Costs of Power-Gating Technique. | Hailin Jiang, Malgorzata Marek-Sadowska, Sani R. Nassif |
| 2005 | ICCD | Pre-layout Physical Connectivity Prediction with Application in Clustering-Based Placement. | Qinghua Liu, Malgorzata Marek-Sadowska |
| 2004 | DAC | Pre-layout wire length and congestion estimation. | Qinghua Liu, Malgorzata Marek-Sadowska |
| 2004 | DAC | On designing via-configurable cell blocks for regular fabrics. | Yajun Ran, Malgorzata Marek-Sadowska |
| 2004 | DAC | Buffer sizing for clock power minimization subject to general skew constraints. | Kai Wang, Malgorzata Marek-Sadowska |
| 2004 | DATE | Eliminating False Positives in Crosstalk Noise Analysis. | Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Malgorzata Marek-Sadowska |
| 2004 | ICCAD | Multilevel expansion-based VLSI placement with blockages. | Bo Hu, Malgorzata Marek-Sadowska |
| 2004 | ICCAD | An integrated design flow for a via-configurable gate array. | Yajun Ran, Malgorzata Marek-Sadowska |
| 2004 | ICCD | The Magic of a Via-Configurable Regular Fabric. | Yajun Ran, Malgorzata Marek-Sadowska |
| 2004 | ICCD | Potential Slack Budgeting with Clock Skew Optimization. | Kai Wang, Malgorzata Marek-Sadowska |
| 2004 | ICCD | Diagnosis of Hold Time Defects. | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
| 2003 | DAC | Temporofunctional crosstalk noise analysis. | Donald Chai, Alex Kondratyev, Yajun Ran, Kenneth H. Tseng, Yosinori Watanabe, Malgorzata Marek-Sadowska |
| 2003 | DAC | Wire length prediction based clustering and its application in placement. | Bo Hu, Malgorzata Marek-Sadowska |
| 2003 | DAC | Gain-based technology mapping for discrete-size cell libraries. | Bo Hu, Yosinori Watanabe, Alex Kondratyev, Malgorzata Marek-Sadowska |
| 2003 | DAC | Crosstalk noise in FPGAs. | Yajun Ran, Malgorzata Marek-Sadowska |
| 2003 | DAC | On-chip power supply network optimization using multigrid-based technique. | Kai Wang, Malgorzata Marek-Sadowska |
| 2003 | DAC | Delay budgeting in sequential circuit with application on FPGA placement. | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
| 2003 | DATE | Power/Ground Mesh Area Optimization Using Multigrid-Based Technique. | Kai Wang, Malgorzata Marek-Sadowska |
| 2003 | ICCAD | Minimum-Area Sequential Budgeting for FPGA. | Chao-Yang Yeh, Malgorzata Marek-Sadowska |
| 2003 | ICCD | Multiple Fault Diagnosis Using n-Detection Tests. | Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
| 2003 | ISCAS | A crosstalk aware two-pin net router. | Ming-Fu Hsiao, Malgorzata Marek-Sadowska, Sao-Jie Chen |
| 2003 | ISCAS | Minimizing coupling jitter by buffer resizing for coupled clock networks. | Ming-Fu Hsiao, Malgorzata Marek-Sadowska, Sao-Jie Chen |
| 2003 | ITC | An Efficient and Effective Methodology on the Multiple Fault Diagnosis. | Zhiyuan Wang, Kun-Han Tsai, Malgorzata Marek-Sadowska, Janusz Rajski |
| 2002 | DAC | Coping with buffer delay change due to power and ground noise. | Lauren Hui Chen, Malgorzata Marek-Sadowska, Forrest Brewer |
| 2002 | DATE | Closed-Form Crosstalk Noise Metrics for Physical Design Applications. | Lauren Hui Chen, Malgorzata Marek-Sadowska |
| 2002 | DATE | Sizing Power/Ground Meshes for Clocking and Computing Circuit Components. | Arindam Mukherjee, Kai Wang, Lauren Hui Chen, Malgorzata Marek-Sadowska |
| 2002 | FPGA | Efficient circuit clustering for area and power reduction in FPGAs. | Amit Singh, Malgorzata Marek-Sadowska |
| 2002 | ICCAD | ATPG-based logic synthesis: an overview. | Chih-Wei Jim Chang, Malgorzata Marek-Sadowska |
| 2002 | ICCAD | Congestion minimization during placement without estimation. | Bo Hu, Malgorzata Marek-Sadowska |
| 2001 | DAC | Layout-Driven Hot-Carrier Degradation Minimization Using Logic Restructuring Techniques. | Chih-Wei Jim Chang, Kai Wang, Malgorzata Marek-Sadowska |
| 2001 | DAC | Latency and Latch Count Minimization in Wave Steered Circuits. | Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska |
| 2001 | DAC | Functional Correlation Analysis in Crosstalk Induced Critical Paths Identification. | Tong Xiao, Malgorzata Marek-Sadowska |
| 2001 | DATE | In-place delay constrained power optimization using functional symmetries. | Chih-Wei Jim Chang, Bo Hu, Malgorzata Marek-Sadowska |
| 2001 | DSD | A Global Routing Technique for Wave-Steering Design Methodology. | Nobuo Funabiki, Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska |
| 2001 | FPGA | Interconnect pipelining in a throughput-intensive FPGA architecture. | Amit Singh, Arindam Mukherjee, Malgorzata Marek-Sadowska |
| 2001 | ICCAD | Single-Pass Redundancy Addition and Removal. | Chih-Wei Jim Chang, Malgorzata Marek-Sadowska |
| 2001 | ICCAD | Interconnect Resource-Aware Placement for Hierarchical FPGAs. | Amit Singh, Ganapathy Parthasarathy, Malgorzata Marek-Sadowska |
| 2001 | ICCD | Gate Sizing to Eliminate Crosstalk Induced Timing Violation. | Tong Xiao, Malgorzata Marek-Sadowska |
| 2000 | DAC | Fast post-placement rewiring using easily detectable functional symmetries. | Chih-Wei Jim Chang, Chung-Kuan Cheng, Peter Suaris, Malgorzata Marek-Sadowska |
| 2000 | DAC | Wave-steering one-hot encoded FSMs. | Luca Macchiarulo, Malgorzata Marek-Sadowska |
| 2000 | DATE | Wave Steered FSMs. | Luca Macchiarulo, Shih-Ming Shu, Malgorzata Marek-Sadowska |
| 2000 | FPGA | A novel high throughput reconfigurable FPGA architecture. | Amit Singh, Luca Macchiarulo, Arindam Mukherjee, Malgorzata Marek-Sadowska |
| 2000 | ICCD | Worst Delay Estimation in Crosstalk Aware Static Timing Analysis. | Tong Xiao, Malgorzata Marek-Sadowska |
| 1999 | ASPDAC | Crosstalk Reduction by Transistor Sizing. | Tong Xiao, Malgorzata Marek-Sadowska |
| 1999 | DAC | Wave Steering in YADDs: A Novel Non-Iterative Synthesis and Layout Technique. | Arindam Mukherjee, Ranganathan Sudhakar, Malgorzata Marek-Sadowska, Stephen I. Long |
| 1999 | ITC | STAR-ATPG: a high speed test pattern generator for large scan designs. | Kuo-Hui Tsai, Tompson, Janusz Rajski, Malgorzata Marek-Sadowska |
| 1999 | VLSID | Modeling Crosstalk in Resistive VLSI Interconnections. | Ashok Vittal, Lauren Hui Chen, Malgorzata Marek-Sadowska, Kai-Ping Wang, Sherry Yang |
| 1998 | DATE | Functional Scan Chain Testing. | Douglas Chang, Kwang-Ting Cheng, Malgorzata Marek-Sadowska, Mike Tien-Chien Lee |
| 1998 | FPGA | Partitioning Sequential Circuits on Dynamically Reconfiguable FPGAs. | Douglas Chang, Malgorzata Marek-Sadowska |
| 1997 | ASPDAC | Not necessarily more switches more routability [sic.]. | Yu-Liang Wu, Douglas Chang, Malgorzata Marek-Sadowska, Shuji Tsukiyama |
| 1997 | DAC | A Test Synthesis Approach to Reducing BALLAST DFT Overhead. | Douglas Chang, Mike Tien-Chien Lee, Malgorzata Marek-Sadowska, Takashi Aikyo, Kwang-Ting Cheng |
| 1997 | DAC | Post-Layout Logic Restructuring for Performance Optimization. | Yi-Min Jiang, Angela Krstic, Kwang-Ting Cheng, Malgorzata Marek-Sadowska |
| 1997 | DAC | STARBIST: Scan Autocorrelated Random Pattern Generation. | Kun-Han Tsai, Sybille Hellebrand, Janusz Rajski, Malgorzata Marek-Sadowska |
| 1997 | FPGA | Buffer Minimization and Time-Multiplexed I/O on Dynamically Reconfigurable FPGAs. | Douglas Chang, Malgorzata Marek-Sadowska |
| 1997 | ITC | Scan-Encoded Test Pattern Generation for BIST. | Kun-Han Tsai, Malgorzata Marek-Sadowska, Janusz Rajski |
| 1996 | DAC | A New Hybrid Methodology for Power Estimation. | David Ihsin Cheng, Kwang-Ting Cheng, Deborah C. Wang, Malgorzata Marek-Sadowska |
| 1996 | DAC | Test Point Insertion: Scan Paths through Combinational Logic. | Chih-Chang Lin, Malgorzata Marek-Sadowska, Kwang-Ting Cheng, Mike Tien-Chien Lee |
| 1996 | DAC | Multilevel Logic Synthesis for Arithmetic Functions. | Chien-Chung Tsai, Malgorzata Marek-Sadowska |
| 1996 | DATE | Perturb and Simplify: Optimizing Combinational Circuits with External Don't Cares. | Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 1996 | DATE | Sequential Permissible Functions and their Application to Circuit Optimization. | Chih-Chang Lin, Malgorzata Marek-Sadowska, Kuang-Chien Chen, Mike Tien-Chien Lee |
| 1996 | ICCAD | Fast Boolean optimization by rewiring. | Shih-Chieh Chang, Lukas P. P. P. van Ginneken, Malgorzata Marek-Sadowska |
| 1996 | ICCAD | Clock skew optimization for ground bounce control. | Ashok Vittal, Hein Ha, Forrest Brewer, Malgorzata Marek-Sadowska |
| 1995 | ASPDAC | Logic rectification and synthesis for engineering change. | Chih-Chang Lin, David Ihsin Cheng, Malgorzata Marek-Sadowska, Kuang-Chien Chen |
| 1995 | ASPDAC | Routing on regular segmented 2-D FPGAs. | Yu-Liang Wu, Malgorzata Marek-Sadowska |
| 1995 | DAC | An Efficient Algorithm for Local Don't Care Sets Calculation. | Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng |
| 1995 | DAC | Logic Synthesis for Engineering Change. | Chih-Chang Lin, Kuang-Chien Chen, Shih-Chieh Chang, Malgorzata Marek-Sadowska, Kwang-Ting Cheng |
| 1995 | DAC | Power Optimal Buffered Clock Tree Design. | Ashok Vittal, Malgorzata Marek-Sadowska |
| 1995 | DAC | Power Distribution Topology Design. | Ashok Vittal, Malgorzata Marek-Sadowska |
| 1995 | DAC | Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing. | Yu-Liang Wu, Malgorzata Marek-Sadowska |
| 1995 | ICCAD | Circuit partitioning with logic perturbation. | David Ihsin Cheng, Chih-Chang Lin, Malgorzata Marek-Sadowska |
| 1995 | ICCAD | Cost-free scan: a low-overhead scan path design methodology. | Chih-Chang Lin, Mike Tien-Chien Lee, Malgorzata Marek-Sadowska, Kuang-Chien Chen |
| 1994 | DAC | Layout Driven Logic Synthesis for FPGAs. | Shih-Chieh Chang, Kwang-Ting Cheng, Nam Sung Woo, Malgorzata Marek-Sadowska |
| 1994 | DAC | Boolean Matching Using Generalized Reed-Muller Forms. | Chien-Chung Tsai, Malgorzata Marek-Sadowska |
| 1994 | DAC | Minimal Delay Interconnect Design Using Alphabetic Trees. | Ashok Vittal, Malgorzata Marek-Sadowska |
| 1994 | ICCAD | Perturb and simplify: multi-level boolean network optimizer. | Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 1994 | ICCAD | Universal logic gate for FPGA design. | Chih-Chang Lin, Malgorzata Marek-Sadowska, Duane Gatlin |
| 1994 | ISCAS | Detecting Symmetric Variables in Boolean Functions using Generalized Reel-Muller Forms. | Chien-Chung Tsai, Malgorzata Marek-Sadowska |
| 1992 | ICCD | Technology Mapping via Transformations of Function Graphs. | Shih-Chieh Chang, Malgorzata Marek-Sadowska |
| 1992 | VLSID | A New Accurate and Efficient Timing Simulator. | Shen Lin, Ernest S. Kuh, Malgorzata Marek-Sadowska |
| 1991 | ICCAD | The Crossing Distribution Problem. | Malgorzata Marek-Sadowska, Majid Sarrafzadeh |
| 1990 | DAC | Delay and Area Optimization in Standard-Cell Design. | Shen Lin, Malgorzata Marek-Sadowska, Ernest S. Kuh |
| 1990 | ICCAD | Floorplanning with Pin Assignment. | Massoud Pedram, Malgorzata Marek-Sadowska, Ernest S. Kuh |
| 1990 | ICCD | Pin assignment for improved performance in standard cell design. | Malgorzata Marek-Sadowska, Shen P. Lin |
| 1989 | DAC | Automatic Sizing of Power/Ground (P/G) Networks in VLSI. | Rajiv Dutta, Malgorzata Marek-Sadowska |
| 1989 | ICCAD | Timing driven placement. | Malgorzata Marek-Sadowska, Shen Lin |
| 1985 | DAC | Two-dimensional router for double layer layout. | Malgorzata Marek-Sadowska |