| 2026 | ASPLOS | Compass: Navigating the Design Space of Taint Schemes for RTL Security Verification. | Yuheng Yang, Qinhan Tan, Thomas Bourgeat, Sharad Malik, Mengjia Yan |
| 2026 | DATE | SecIC3: Customizing IC3 for Hardware Security Verification. | Qinhan Tan, Akash Gaonkar, Yu-Wei Fan, Aarti Gupta, Sharad Malik |
| 2026 | SP | Interplay of Efficient Model Checking and Secure Processor Design: A Case Study on Secure Speculation. | Tingzhen Dong, Qinhan Tan, Kunpeng Wang, Thomas Bourgeat, Yuheng Yang, Sharad Malik, Yu-Wei Fan, Mengjia Yan |
| 2026 | SP | INSIGHT: Automatic Generation of Explanations for Efficient Identification of Hardware Bugs and Underspecifications. | Vincent Quentin Ulitzsch, Alessandro Bertani, Peter W. Deutsch, David Langus Rodriguez, Kelly Xu, Aarti Gupta, Sharad Malik, Mengjia Yan |
| 2025 | ASPLOS | RTL Verification for Secure Speculation Using Contract Shadow Logic. | Qinhan Tan, Yuheng Yang, Thomas Bourgeat, Sharad Malik, Mengjia Yan |
| 2024 | ASPDAC | Exact Scheduling to Minimize Off-Chip Data Movement for Deep Learning Accelerators. | Yi Li, Aarti Gupta, Sharad Malik |
| 2024 | ICCAD | Automatic Verification and Identification of Partial Retention Register Sets for Low-Power Designs. | Yu-An Shih, Sharad Malik |
| 2024 | ICCAD | Automatic Generation of Cycle-Accurate Timing Models from RTL for Hardware Accelerators. | Yu Zeng, Aarti Gupta, Sharad Malik |
| 2023 | CCS | Security Verification of Low-Trust Architectures. | Qinhan Tan, Yonathan Fisseha, Shibo Chen, Lauren Biernacki, Jean-Baptiste Jeannin, Sharad Malik, Todd M. Austin |
| 2023 | DAC | INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich Platforms. | Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik |
| 2022 | ASPDAC | Generalizing Tandem Simulation: Connecting High-level and RTL Simulation Models. | Yue Xing, Aarti Gupta, Sharad Malik |
| 2022 | DATE | Automatic Generation of Architecture-Level Models from RTL Designs for Processors and Accelerators. | Yu Zeng, Aarti Gupta, Sharad Malik |
| 2022 | ICCAD | Usage-Based RTL Subsetting for Hardware Accelerators. | Qinhan Tan, Aarti Gupta, Sharad Malik |
| 2022 | ICCAD | Compositional Verification Using a Formal Component and Interface Specification. | Yue Xing, Huaixi Lu, Aarti Gupta, Sharad Malik |
| 2021 | DATE | Leveraging Processor Modeling and Verification for General Hardware Modules. | Yue Xing, Huaixi Lu, Aarti Gupta, Sharad Malik |
| 2021 | ICCAD | Generating Architecture-Level Abstractions from RTL Designs for Processors and Accelerators Part I: Determining Architectural State Variables. | Yu Zeng, Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik |
| 2021 | VMCAI | Syntax-Guided Synthesis for Lemma Generation in Hardware Model Checking. | Hongce Zhang, Aarti Gupta, Sharad Malik |
| 2020 | VMCAI | Synthesizing Environment Invariants for Modular Hardware Verification. | Hongce Zhang, Weikun Yang, Grigory Fedyukovich, Aarti Gupta, Sharad Malik |
| 2019 | ASPLOS | Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn. | Mark Gallagher, Lauren Biernacki, Shibo Chen, Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Austin Harris, Zhixing Xu, Baris Kasikci, Valeria Bertacco, Sharad Malik, Mohit Tiwari, Todd M. Austin |
| 2019 | ISCAS | SpFlow: Memory-Driven Data Flow Optimization for Sparse Matrix-Matrix Multiplication. | Qi Nie, Sharad Malik |
| 2019 | TACAS | ILAng: A Modeling and Verification Platform for SoCs Using Instruction-Level Abstractions. | Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik |
| 2018 | ASPDAC | MemFlow: Memory-driven data scheduling with datapath co-design in accelerators for large-scale inference applications. | Qi Nie, Sharad Malik |
| 2018 | CAV | Lazy Self-composition for Security Verification. | Weikun Yang, Yakir Vizel, Pramod Subramanyan, Aarti Gupta, Sharad Malik |
| 2018 | DAC | Formal security verification of concurrent firmware in SoCs using instruction-level abstraction for hardware. | Bo-Yuan Huang, Sayak Ray, Aarti Gupta, Jason M. Fung, Sharad Malik |
| 2018 | FMCAD | ILA-MCM: Integrating Memory Consistency Models with Instruction-Level Abstractions for Heterogeneous System-on-Chip Verification. | Hongce Zhang, Caroline Trippel, Yatin A. Manerkar, Aarti Gupta, Margaret Martonosi, Sharad Malik |
| 2018 | ICCAD | Vulnerability-tolerant secure architectures. | Todd M. Austin, Valeria Bertacco, Baris Kasikci, Sharad Malik, Mohit Tiwari |
| 2018 | ICCAD | A formal instruction-level GPU model for scalable verification. | Yue Xing, Bo-Yuan Huang, Aarti Gupta, Sharad Malik |
| 2017 | DATE | Evaluating matrix representations for error-tolerant computing. | Pareesa Ameneh Golnari, Sharad Malik |
| 2017 | DATE | Malware detection using machine learning based analysis of virtual memory access patterns. | Zhixing Xu, Sayak Ray, Pramod Subramanyan, Sharad Malik |
| 2017 | FMCAD | Solving linear arithmetic with SAT-based model checking. | Yakir Vizel, Alexander Nadel, Sharad Malik |
| 2017 | VMCAI | IC3 - Flipping the E in ICE. | Yakir Vizel, Arie Gurfinkel, Sharon Shoham, Sharad Malik |
| 2016 | AAAI | Constrained Sampling and Counting: Universal Hashing Meets SAT Solving. | Kuldeep S. Meel, Moshe Y. Vardi, Supratik Chakraborty, Daniel J. Fremont, Sanjit A. Seshia, Dror Fried, Alexander Ivrii, Sharad Malik |
| 2016 | DAC | Invited - Specification and modeling for systems-on-chip security verification. | Sharad Malik, Pramod Subramanyan |
| 2016 | DATE | Verifying information flow properties of firmware using symbolic execution. | Pramod Subramanyan, Sharad Malik, Hareesh Khattri, Abhranil Maiti, Jason M. Fung |
| 2015 | ASPLOS | CommGuard: Mitigating Communication Errors in Error-Prone Parallel Execution. | Yavuz Yetim, Sharad Malik, Margaret Martonosi |
| 2015 | CAV | Fast Interpolating BMC. | Yakir Vizel, Arie Gurfinkel, Sharad Malik |
| 2015 | DATE | Hardware Trojan detection for gate-level ICs using signal correlation based clustering. | Burin akir, Sharad Malik |
| 2015 | DATE | Optimizing dynamic trace signal selection using machine learning and linear programming. | Charlie Shucheng Zhu, Sharad Malik |
| 2015 | FMCAD | Detecting Hardware Trojans: A Tale of Two Techniques. | Sharad Malik |
| 2015 | FMCAD | Template-based Synthesis of Instruction-Level Abstractions for SoC Verification. | Pramod Subramanyan, Yakir Vizel, Sayak Ray, Sharad Malik |
| 2015 | ICCAD | Error-Tolerant Processors: Formal Specification and Verification. | Ameneh Golnari, Yakir Vizel, Sharad Malik |
| 2014 | ATVA | Using Flow Specifications of Parameterized Cache Coherence Protocols for Verifying Deadlock Freedom. | Divjyot Sethi, Muralidhar Talupur, Sharad Malik |
| 2014 | DSN | An Adaptable Rule Placement for Software-Defined Networks. | Shuyuan Zhang, Franjo Ivancic, Cristian Lumezanu, Yifei Yuan, Aarti Gupta, Sharad Malik |
| 2014 | FMCAD | Template-based circuit understanding. | Adri Gascn, Pramod Subramanyan, Bruno Dutertre, Ashish Tiwari, Dejan Jovanovic, Sharad Malik |
| 2014 | ICCAD | Silicon fault diagnosis using sequence interpolation with backbones. | Charlie Shucheng Zhu, Georg Weissenbacher, Sharad Malik |
| 2014 | ICNP | In-Band Update for Network Routing Policy Migration. | Shuyuan Zhang, Sharad Malik, Sanjai Narain, Laurent Vanbever |
| 2014 | VLSID | All-SAT Using Minimal Blocking Clauses. | Yinlei Yu, Pramod Subramanyan, Nestan Tsiskaridze, Sharad Malik |
| 2014 | SIGCOMM | An assertion language for debugging SDN applications. | Ryan Beckett, Xuan Kelvin Zou, Shuyuan Zhang, Sharad Malik, Jennifer Rexford, David Walker |
| 2013 | ATVA | SAT Based Verification of Network Data Planes. | Shuyuan Zhang, Sharad Malik |
| 2013 | DATE | Reverse engineering digital circuits using functional analysis. | Pramod Subramanyan, Nestan Tsiskaridze, Kanika Pasricha, Dillon Reisman, Adriana Susnea, Sharad Malik |
| 2013 | DATE | Extracting useful computation from error-prone processors for streaming applications. | Yavuz Yetim, Margaret Martonosi, Sharad Malik |
| 2013 | FMCAD | Abstractions for model checking SDN controllers. | Divjyot Sethi, Srinivas Narayana, Sharad Malik |
| 2012 | ASPDAC | EPROF: An energy/performance/reliability optimization framework for streaming applications. | Yavuz Yetim, Sharad Malik, Margaret Martonosi |
| 2012 | ATVA | Parallel Assertions for Architectures with Weak Memory Models. | Daniel Schwartz-Narbonne, Georg Weissenbacher, Sharad Malik |
| 2012 | ATVA | Verification of Computer Switching Networks: An Overview. | Shuyuan Zhang, Sharad Malik, Rick McGeer |
| 2012 | CAV | passert: A Tool for Debugging Parallel Programs. | Daniel Schwartz-Narbonne, Feng Liu, David I. August, Sharad Malik |
| 2012 | DAC | Specification and synthesis of hardware checkpointing and rollback mechanisms. | Carven Chan, Daniel Schwartz-Narbonne, Divjyot Sethi, Sharad Malik |
| 2012 | FMCAD | Efficient predictive analysis for detecting nondeterminism in multi-threaded programs. | Arnab Sinha, Sharad Malik, Aarti Gupta |
| 2012 | ICNP | Verification and synthesis of firewalls using SAT and QBF. | Shuyuan Zhang, Abdulrahman Mahmoud, Sharad Malik, Sanjai Narain |
| 2012 | TACAS | Wolverine: Battling Bugs with Interpolants - (Competition Contribution). | Georg Weissenbacher, Daniel Kroening, Sharad Malik |
| 2011 | FMCAD | Post-silicon fault localisation using maximum satisfiability and backbones. | Charlie Shucheng Zhu, Georg Weissenbacher, Sharad Malik |
| 2011 | MEMOCODE | Parallel assertions for debugging parallel programs. | Daniel Schwartz-Narbonne, Feng Liu, Tarun Pondicherry, David I. August, Sharad Malik |
| 2011 | MEMOCODE | Predictive analysis for detecting serializability violations through Trace Segmentation. | Arnab Sinha, Sharad Malik, Chao Wang, Aarti Gupta |
| 2011 | RV | Runtime Verification: A Computer Architecture Perspective. | Sharad Malik |
| 2008 | HPCA | Runtime validation of memory ordering using constraint graph checking. | Kaiyu Chen, Sharad Malik, Priyadarsan Patra |
| 2008 | VLSID | Exploiting Circuit Reconvergence through Static Learning in CNF SAT Solvers. | Yinlei Yu, Cameron Brien, Sharad Malik |
| 2008 | TACAS | Hardware Verification: Techniques, Methodology and Solutions. | Sharad Malik |
| 2007 | FMCAD | Automating Hazard Checking in Transaction-Level Microarchitecture Models. | Yogesh S. Mahajan, Sharad Malik |
| 2007 | MEMOCODE | Verification Driven Formal Architecture and Microarchitecture Modeling. | Yogesh S. Mahajan, Carven Chan, Ali Alphan Bayazit, Sharad Malik, Wei Qin |
| 2007 | VLSID | Extracting Logic Circuit Structure from Conjunctive Normal Form Descriptions. | Zhaohui Fu, Sharad Malik |
| 2006 | FMCAD | Understanding the Dynamic Behavior of Modern DPLL SAT Solvers through Visual Analysis. | Cameron Brien, Sharad Malik |
| 2006 | ICCAD | Solving the minimum-cost satisfiability problem using SAT based branch-and-bound search. | Zhaohui Fu, Sharad Malik |
| 2006 | PRDC | Dependable Multithreaded Processing Using Runtime Validation. | Kaiyu Chen, Sharad Malik |
| 2006 | SAT | On Solving the Partial MAX-SAT Problem. | Zhaohui Fu, Sharad Malik |
| 2006 | SAT | Solving Quantified Boolean Formulas with Circuit Observability Don't Cares. | Daijue Tang, Sharad Malik |
| 2006 | SAT | Lemma Learning in SMT on Linear Constraints. | Yinlei Yu, Sharad Malik |
| 2005 | ASPDAC | Validating the result of a Quantified Boolean Formula (QBF) solver: theory and practice. | Yinlei Yu, Sharad Malik |
| 2005 | CAV | Symmetry Reduction in SAT-Based Model Checking. | Daijue Tang, Sharad Malik, Aarti Gupta, C. Norris Ip |
| 2005 | DATE | Considering Circuit Observability Don't Cares in CNF Satisfiability. | Zhaohui Fu, Yinlei Yu, Sharad Malik |
| 2005 | DATE | A Technology-Aware and Energy-Oriented Topology Exploration for On-Chip Networks. | Hangsheng Wang, Li-Shiuan Peh, Sharad Malik |
| 2005 | ICCAD | Complementary use of runtime validation and model checking. | Ali Alphan Bayazit, Sharad Malik |
| 2005 | ISLPED | Bounds on power savings using runtime dynamic voltage scaling: an exact algorithm and a linear-time heuristic approximation. | Fen Xie, Margaret Martonosi, Sharad Malik |
| 2004 | DATE | Using a Communication Architecture Specification in an Application-Driven Retargetable Prototyping Platform for Multiprocessing. | Xinping Zhu, Sharad Malik |
| 2004 | SAT | Zchaff2004: An Efficient SAT Solver. | Yogesh S. Mahajan, Zhaohui Fu, Sharad Malik |
| 2004 | SAT | A Comparative Study of 2QBF Algorithms. | Darsh Ranjan, Daijue Tang, Sharad Malik |
| 2004 | SAT | Analysis of Search Based Algorithms for Satisfiability of Quantified Boolean Formulas Arising from Circuit State Space Diameter Problems. | Daijue Tang, Yinlei Yu, Darsh Ranjan, Sharad Malik |
| 2004 | SAT | Analysis of Search Based Algorithms for Satisfiability of Propositional and Quantified Boolean Formulas Arising from Circuit State Space Diameter Problems. | Daijue Tang, Yinlei Yu, Darsh Ranjan, Sharad Malik |
| 2003 | DAC | Automated synthesis of efficient binary decoders for retargetable software toolkits. | Wei Qin, Sharad Malik |
| 2003 | DATE | Flexible and Formal Modeling of Microprocessors with Application to Retargetable Simulation. | Wei Qin, Sharad Malik |
| 2003 | DATE | Modeling and Integration of Peripheral Devices in Embedded Systems. | Shaojie Wang, Sharad Malik, Reinaldo A. Bergamaschi |
| 2003 | DATE | Validating SAT Solvers Using an Independent Resolution-Based Checker: Practical Implementations and Other Applications. | Lintao Zhang, Sharad Malik |
| 2003 | MICRO | Power-driven Design of Router Microarchitectures in On-chip Networks. | Hangsheng Wang, Li-Shiuan Peh, Sharad Malik |
| 2003 | PLDI | Compile-time dynamic voltage scaling settings: opportunities and limits. | Fen Xie, Margaret Martonosi, Sharad Malik |
| 2003 | SAT | Cache Performance of SAT Solvers: a Case Study for Efficient Implementation of Algorithms. | Lintao Zhang, Sharad Malik |
| 2002 | CADE | The Quest for Efficient Boolean Satisfiability Solvers. | Lintao Zhang, Sharad Malik |
| 2002 | CAV | The Quest for Efficient Boolean Satisfiability Solvers. | Lintao Zhang, Sharad Malik |
| 2002 | CP | Towards a Symmetric Treatment of Satisfaction and Conflicts in Quantified Boolean Formula Evaluation. | Lintao Zhang, Sharad Malik |
| 2002 | DAC | Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver. | Malay K. Ganai, Pranav Ashar, Aarti Gupta, Lintao Zhang, Sharad Malik |
| 2002 | DAC | Exploiting operation level parallelism through dynamically reconfigurable datapaths. | Zhining Huang, Sharad Malik |
| 2002 | DAC | Unified tools for SoC embedded systems: mission critical, mission impossible or mission irrelevant? | Gary Smith, Daya Nadamuni, Sharad Malik, Rick Chapman, John Fogelin, Kurt Keutzer, Grant Martin, Brian Bailey |
| 2002 | EMSOFT | Design Tools for Application Specific Embedded Processors. | Wei Qin, Subramanian Rajagopalan, Manish Vachharajani, Hangsheng Wang, Xinping Zhu, David I. August, Kurt Keutzer, Sharad Malik, Li-Shiuan Peh |
| 2002 | HOTI | A Power Model for Routers: Modeling Alpha 21364 and InfiniBand Routers. | Hangsheng Wang, Li-Shiuan Peh, Sharad Malik |
| 2002 | ICCAD | Conflict driven learning in a quantified Boolean Satisfiability solver. | Lintao Zhang, Sharad Malik |
| 2002 | ICCAD | A hierarchical modeling framework for on-chip communication architectures. | Xinping Zhu, Sharad Malik |
| 2002 | ICCD | From ASIC to ASIP: The Next Design Discontinuity. | Kurt Keutzer, Sharad Malik, A. Richard Newton |
| 2002 | MICRO | Orion: a power-performance simulator for interconnection networks. | Hangsheng Wang, Xinping Zhu, Li-Shiuan Peh, Sharad Malik |
| 2001 | CC | Optimal Live Range Merge for Address Register Allocation in Embedded Programs. | Guilherme Ottoni, Sandro Rigo, Guido Araujo, Subramanian Rajagopalan, Sharad Malik |
| 2001 | DAC | Chaff: Engineering an Efficient SAT Solver. | Matthew W. Moskewicz, Conor F. Madigan, Ying Zhao, Lintao Zhang, Sharad Malik |
| 2001 | DAC | Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design. | Marco Sgroi, Michael Sheets, Andrew Mihal, Kurt Keutzer, Sharad Malik, Jan M. Rabaey, Alberto L. Sangiovanni-Vincentelli |
| 2001 | DATE | Managing dynamic reconfiguration overhead in systems-on-a-chip design using reconfigurable datapaths and optimized interconnection networks. | Zhining Huang, Sharad Malik |
| 2001 | EMSOFT | Embedded Software Implementation Tools for Fully Programmable Application Specific Systems. | Sharad Malik |
| 2001 | ICCAD | Partition-Based Decision Heuristics for Image Computation Using SAT and BDDs. | Aarti Gupta, Zijiang Yang, Pranav Ashar, Lintao Zhang, Sharad Malik |
| 2001 | ICCAD | Efficient Conflict Driven Learning in Boolean Satisfiability Solver. | Lintao Zhang, Conor F. Madigan, Matthew W. Moskewicz, Sharad Malik |
| 2001 | ICCD | Matching Architecture to Application Via Configurable Processors: A Case Study with Boolean Satisfiability Problem. | Ying Zhao, Sharad Malik, Albert R. Wang, Matthew W. Moskewicz, Conor F. Madigan |
| 2000 | CASES | Handling irregular ILP within conventional VLIW schedulers using artificial resource constraints. | Subramanian Rajagopalan, Manish Vachharajani, Sharad Malik |
| 2000 | DAC | Embedded systems education (panel abstract). | Sharad Malik, D. K. Arvind, Edward A. Lee, Phil Koopman, Alberto L. Sangiovanni-Vincentelli, Wayne H. Wolf |
| 2000 | ICCAD | Incremental CAD. | Olivier Coudert, Jason Cong, Sharad Malik, Majid Sarrafzadeh |
| 2000 | ICS | Automated cache optimizations using CME driven diagnosis. | Somnath Ghosh, Margaret Martonosi, Sharad Malik |
| 2000 | VLSID | Processor Evaluation in an Embedded Systems Design Environment. | T. Vinod Kumar Gupta, Purvesh Sharma, M. Balakrishnan, Sharad Malik |
| 1999 | DAC | Exact Memory Size Estimation for Array Computations without Loop Unrolling. | Ying Zhao, Sharad Malik |
| 1999 | VLSID | CAD Techniques for Embedded System Design. | Srinivas Devadas, Sharad Malik, Jos Monteiro, Luciano Lavagno |
| 1998 | ASPLOS | Precise Miss Analysis for Program Transformations with Caches of Arbitrary Associativity. | Somnath Ghosh, Margaret Martonosi, Sharad Malik |
| 1998 | DAC | Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability. | Peixin Zhong, Pranav Ashar, Sharad Malik, Margaret Martonosi |
| 1998 | FCCM | Accelerating Boolean Satisfiability with Configurable Hardware. | Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik |
| 1998 | FPL | Solving Boolean Satisfiability with Dynamic Hardware Configurations. | Peixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik |
| 1997 | DAC | Toward Formalizing a Validation Methodology Using Simulation Coverage. | Aarti Gupta, Sharad Malik, Pranav Ashar |
| 1997 | DAC | Static Timing Analysis of Embedded Software. | Sharad Malik, Margaret Martonosi, Yau-Tsun Steven Li |
| 1997 | EuroPar | Cinderella: A Retargetable Environment for Performance Analysis of Real-Time Software. | Yau-Tsun Steven Li, Sharad Malik, Andrew Wolfe |
| 1997 | ICASSP | Optimization of embedded DSP programs using post-pass data-flow analysis. | Ashok Sudarsanam, Sharad Malik, Steven W. K. Tjiang, Stan Y. Liao |
| 1997 | ICS | Cache Miss Equations: An Analytical Representation of Cache Misses. | Somnath Ghosh, Margaret Martonosi, Sharad Malik |
| 1997 | VLSID | Dynamic Power Management for Microprocessors: A Case Study. | Vivek Tiwari, Ryan Donnelly, Sharad Malik, Ricardo Gonzalez |
| 1996 | DAC | Using Register-Transfer Paths in Code Generation for Heterogeneous Memory-Register Architectures. | Guido Araujo, Sharad Malik, Mike Tien-Chien Lee |
| 1996 | ICCAD | Using complete-1-distinguishability for FSM equivalence checking. | Pranav Ashar, Aarti Gupta, Sharad Malik |
| 1996 | ICCAD | The case for retiming with explicit reset circuitry. | Vigyan Singhal, Sharad Malik, Robert K. Brayton |
| 1996 | VLSID | Register Transfer Level Synthesis: From Theory to Practice. | Kurt Keutzer, Sharad Malik |
| 1996 | VLSID | Instruction Level Power Analysis and Optimization of Software. | Vivek Tiwari, Sharad Malik, Andrew Wolfe, Mike Tien-Chien Lee |
| 1996 | RTSS | Cache modeling for real-time software: beyond direct mapped instruction caches. | Yau-Tsun Steven Li, Sharad Malik, Andrew Wolfe |
| 1995 | ASPDAC | Delay abstraction in combinational logic circuits. | Noriya Kobayashi, Sharad Malik |
| 1995 | ASPDAC | Limits of using signatures for permutation independent Boolean comparison. | Janett Mohnke, Paul Molitor, Sharad Malik |
| 1995 | DAC | A Survey of Optimization Techniques Targeting Low Power VLSI Circuits. | Srinivas Devadas, Sharad Malik |
| 1995 | DAC | Performance Analysis of Embedded Software Using Implicit Path Enumeration. | Yau-Tsun Steven Li, Sharad Malik |
| 1995 | DATE | Prediction of interconnect delay in logic synthesis. | Horng-Fei Jyu, Sharad Malik |
| 1995 | ICCAD | Fast functional simulation using branching programs. | Pranav Ashar, Sharad Malik |
| 1995 | ICCAD | Performance estimation of embedded software with instruction cache modeling. | Yau-Tsun Steven Li, Sharad Malik, Andrew Wolfe |
| 1995 | ICCAD | Memory bank and register allocation in software synthesis for ASIPs. | Ashok Sudarsanam, Sharad Malik |
| 1995 | ISLPED | Guarded evaluation: pushing power management to logic synthesis/design. | Vivek Tiwari, Sharad Malik, Pranav Ashar |
| 1995 | VLSID | Test generation for cyclic combinational circuits. | Anand Raghunathan, Pranav Ashar, Sharad Malik |
| 1995 | RTSS | Efficient Microarchitecture Modeling and Path Analysis for Real-Time Software. | Yau-Tsun Steven Li, Sharad Malik, Andrew Wolfe |
| 1994 | DAC | Implicit Computation of Minimum-Cost Feedback-Vertex Sets for Partial Scan and Other Applications. | Pranav Ashar, Sharad Malik |
| 1994 | DAC | Statistical Delay Modeling in Logic Design and Synthesis. | Horng-Fei Jyu, Sharad Malik |
| 1994 | ICCAD | Power analysis of embedded software: a first step towards software power minimization. | Vivek Tiwari, Sharad Malik, Andrew Wolfe |
| 1993 | DAC | Technology Mapping for Lower Power. | Vivek Tiwari, Pranav Ashar, Sharad Malik |
| 1993 | ICCAD | Analysis of cyclic combinational circuits. | Sharad Malik |
| 1993 | ICCD | Statistical Timing Optimization of Combinatorial Logic Circuits. | Horng-Fei Jyu, Sharad Malik |
| 1992 | DAC | Certified Timing Verification and the Transition Delay of a Logic Circuit. | Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang |
| 1992 | ICCAD | Exploiting multi-cycle false paths in the performance optimization of sequential circuits. | Pranav Ashar, Sujit Dey, Sharad Malik |
| 1992 | ICCAD | Verification of asynchronous interface circuits with bounded wire delays. | Srinivas Devadas, Kurt Keutzer, Sharad Malik, Albert R. Wang |
| 1992 | ICCD | Statistical Timing Analysis of Combinational Circuits. | Srinivas Devadas, Horng-Fei Jyu, Kurt Keutzer, Sharad Malik |
| 1991 | DAC | A Synthesis-Based Test Generation and Compaction Algorithm for Multifaults. | Srinivas Devadas, Kurt Keutzer, Sharad Malik |
| 1991 | ICCAD | Delay Computation in Combinational Logic Circuits: Theory and Algorithms. | Srinivas Devadas, Kurt Keutzer, Sharad Malik |
| 1990 | DAC | Is Redundancy Necessary to Reduce Delay. | Kurt Keutzer, Sharad Malik, Alexander Saldanha |
| 1990 | ICCAD | MIS-MV: Optimization of Multi-Level Logic with Multiple-Valued Inputs. | Luciano Lavagno, Sharad Malik, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1990 | ICCAD | Performance Optimization of Pipelined Circuits. | Sharad Malik, Kanwar Jit Singh, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1990 | ICCAD | Algorithms for Discrete Function Manipulation. | Arvind Srinivasan, Timothy Kam, Sharad Malik, Robert K. Brayton |
| 1988 | ICCAD | Logic verification using binary decision diagrams in a logic synthesis environment. | Sharad Malik, Albert R. Wang, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |