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International Symposium on Design and Diagnostics of Electronic Circuits and Systems

DDECS

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering

Papers indexed

1,124

2006–2026

Papers per year

200691 peak2026

DDECS papers

1,124 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2008On Minimizing RTOS Aperiodic Tasks Server Energy Consumption.Karel Dudcek
2008Cryptographic System on a Chip based on Actel ARM7 Soft-Core with Embedded True Random Number Generator.Milos Drutarovsk, Michal Varchola
2008On-chip Integration of Magnetic Force Sensing Current Monitors.Martin Donoval, Martin Daricek, Viera Stopjakov, Juraj Marek
2008Deep-Submicron MOS Transistor Matching: A Case Study.Dimitar P. Dimitrov
2008An Integrated Input Encoding and Symbolic Functional Decomposition for LUT-Based FPGAs.Stanislaw Deniziak, Mariusz Wisniewski
2008Rapid Prototyping of NoC Architectures from a SystemC Specification.Stanislaw Deniziak, Robert Tomaszewski
2008Excitation optimization in fault diagnosis of analog electronic circuits.Lukas Chruszczyk, Jerzy Rutkowski
2008A Spread-Spectrum Clock Generator Using Fractional PLL Controlled Delta-Sigma Modulator for Serial-ATA III.Kuo-Hsing Cheng, Cheng-Liang Hung, Chih-Hsien Chang, Yu-Lung Lo, Wei-Bin Yang, Jiunn-Way Miaw
2008A Low Leakage Non-Volatile Memory Voltage Pulse Generator for RFID Applications.Marco Bucci, Raimondo Luzzi, Santos Torres Vargas
2008Experimental Analog Circuit for Parametric Test Methods Efficiency Evaluation.Juraj Brenkus, Viera Stopjakov, Jozef Mihlov
2008SoC Symbolic Simulation: a case study on delay fault testing.Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi
2008A Resistorless Voltage Reference Source for 90 nm CMOS Technology with Low Sensitivity to Process and Temperature Variations.Tomasz Borejko, Witold A. Pleskacz
2008Built-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology.Marcin J. Beresinski, Tomasz Borejko, Witold A. Pleskacz, Viera Stopjakov
2008Temperature-Aware Task Mapping for Energy Optimization with Dynamic Voltage Scaling.Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng
2008A New Design Technique for Weakly Indicating Function Blocks.P. Balasubramanian, David A. Edwards
2008Improving Circuit Security against Power Analysis Attacks with Subthreshold Operation.Hvard Pedersen Alstad, Snorre Aunet
2008Three Subthreshold Flip-Flop Cells Characterized in 90 nm and 65 nm CMOS Technology.Hvard Pedersen Alstad, Snorre Aunet
2007Design Platform for Quick Integration of an Internet Connectivity into System-on-Chips.Bartosz Wojciechowski, Tomasz Kowalczyk, Wojciech Sakowski
2007Quadrature-Phase Topology of a High Frequency Ring Oscillator.bel Vmos
2007A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System.Chiou-Kou Tung, Yu-Cherng Hung, Shao-Hui Shieh, Guo-Shing Huang
2007Establishing a New Course in Reconfigurable Logic System Design.Jim Trresen, Jorgen Norendal, Kyrre Glette
2007Parts Obsolescence Challenges for the Electronics Industry.Jim Trresen, Thor Arne Lovland
2007Design Issues of a Low Frequency Low-Pass Filter for Medical Applications Using CMOS Technology.Andrs Timr, Mrta Rencz
2007Instance Generation for SAT-based ATPG.Daniel Tille, Grschwin Fey, Rolf Drechsler
2007Developing Virtual ADC Testing Environment in MAPLE.Petr Struhovsk, Ondrej Subrt, Jir Hospodka, Pravoslav Martnek
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