| 2023 | A Comprehensive Analysis of Transient Errors on Systolic Arrays. | Eleonora Vacca, Sarah Azimi, Luca Sterpone |
| 2023 | High-Throughput Approximate Multiplication Models in PyTorch. | Elias Trommer, Bernd Waschneck, Akash Kumar |
| 2023 | APPRAISER: DNN Fault Resilience Analysis Employing Approximation Errors. | Mahdi Taheri, Mohammad Hasan Ahmadilivani, Maksim Jenihhin, Masoud Daneshtalab, Jaan Raik |
| 2023 | A Reliability-aware Environment for Design Exploration for GPU Devices. | Robert Limas Sierra, Juan-David Guerrero-Balaguera, Josie E. Rodriguez Condia, Matteo Sonza Reorda |
| 2023 | Counterfeit Chip Detection using Scattering Parameter Analysis. | Maryam Saadat-Safa, Tahoura Mosavirik, Shahin Tajik |
| 2023 | Structured Design and Evaluation of a Resistor-Based PUF Robust Against PVT-Variations. | Carl Riehm, Christoph Frisch, Florin Burcea, Matthias Hiller, Michael Pehl, Ralf Brederlow |
| 2023 | Data-Driven Test Generation for Black-Box Systems From Learned Decision Tree Models. | Swantje Plambeck, Grschwin Fey |
| 2023 | Prediction of Inference Energy on CNN Accelerators Supporting Approximate Circuits. | Michal Pinos, Vojtech Mrazek, Luks Sekanina |
| 2023 | Resilience-Performance Tradeoff Analysis of a Deep Neural Network Accelerator. | Salvatore Pappalardo, Annachiara Ruospo, Ian O'Connor, Bastien Deveautour, Ernesto Snchez, Alberto Bosio |
| 2023 | Evaluating the Hardware Performance Counters of an Xtensa Virtual Prototype. | Adebayo Omotosho, Sirine Ilahi, Ernesto Cristopher Villegas Castillo, Christian Hammer, Christian Sauer |
| 2023 | A Digital Delay Model Supporting Large Adversarial Delay Variations. | Daniel hlinger, Ulrich Schmid |
| 2023 | A Low-cost Residue-based Scheme for Error-resiliency of RNN Accelerators. | Nooshin Nosrati, Zainalabedin Navabi |
| 2023 | Approximation of Hardware Accelerators driven by Machine-Learning Models : (Embedded Tutorial). | Vojtech Mrazek |
| 2023 | Quality Assessment of Logic Locking Mechanisms using Pseudo-Boolean Optimization Techniques. | Marcel Merten, Muhammad Hassan, Rolf Drechsler |
| 2023 | Efficient Binary Decision Diagram Manipulation by Reducing the Number of Intermediate Nodes. | Rune Krauss, Mehran Goli, Rolf Drechsler |
| 2023 | Standalone Area Optimized ASIC Tag Powered and Programmable by Light for Identification of Novel Drug Candidates. | Dominic Korner, Andreas Kramer, Klaus Hofmann, Felix Hausch |
| 2023 | Optimizing Packet Classification on FPGA. | Michal Kekely, Jan Korenek |
| 2023 | MODEE-LID: Multiobjective Design of Energy-Efficient Hardware Accelerators for Levodopa-Induced Dyskinesia Classifiers. | Martin Hurta, Vojtech Mrazek, Michaela Drahosova, Luks Sekanina |
| 2023 | Reducing Output Response Aliasing Using Boolean Optimization Techniques. | Robert Hlle, Petr Fiser, Jan Schmidt |
| 2023 | A Low-Cost Combinational Approximate Multiplier. | Zahra Hojati, Zainalabedin Navabi |
| 2023 | Verifying Bio-Electronic Systems. | Joseline Heuer, Rene Krenz-Baath, Roman Obermaisser |
| 2023 | Open Automation Framework for Complex Parametric Electrical Simulations. | Sergio Vinagrero Gutierrez, Pietro Inglese, Giorgio Di Natale, Elena-Ioana Vatajelu |
| 2023 | Supporting analog design for reliability by efficient provision of reliability information to designers. | Fabio A. Velarde Gonzalez, Lukas Hahne, Katrin Ortstein, Andr Lange, Sonja Crocoll |
| 2023 | Active Wire Fences for Multitenant FPGAs. | Ognjen Glamocanin, Andela Kostic, Stasa Kostic, Mirjana Stojilovic |
| 2023 | Bits, Flips and RISCs. | Nicolas Gerlin, Endri Kaja, Fabian Vargas, Li Lu, Anselm Breitenreiter, Junchao Chen, Markus Ulbricht, Maribel Gomez, Ares Tahiraga, Sebastian Prebeck, Eyck Jentzsch, Milos Krstic, Wolfgang Ecker |