| 2024 | SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators. | Mahdi Taheri, Masoud Daneshtalab, Jaan Raik, Maksim Jenihhin, Salvatore Pappalardo, Paul Jimnez, Bastien Deveautour, Alberto Bosio |
| 2024 | Performance and Error Tolerance of Stochastic Computing-Based Digital Filter Design. | Roshwin Sengupta, Ilia Polian, John P. Hayes |
| 2024 | Adaptive Input Normalization for Quantized Neural Networks. | Jan Schmidt, Petr Fiser, Miroslav Skrbek |
| 2024 | A Comparison of Logic Extraction Methods in Hardware-Translated Neural Networks. | Jan Schmidt, Petr Fiser, Miroslav Skrbek |
| 2024 | An Autonomous Clock Frequency Supervision Circuit. | Clemens Scharwitzl, Andreas Steininger |
| 2024 | Optimised AES with RISC-V Vector Extensions. | Mahnaz Namazi Rizi, Nusa Zidaric, Lejla Batina, Nele Mentens |
| 2024 | A Low-Noise High-Voltage Rail-to-Rail Operational Amplifier with Gain Stabilization and Slew-Rate Enhancement. | Jie Pan, Fanyang Li, Yidong Yuan, Tianting Zhao, Hongwei Shen, Liguo Wen, Yi Hu, Jiazhen Jin, Shuwen Wu |
| 2024 | Fault-Simulation-Based Flip-Flop Classification for Reverse Engineering. | Michael Mildner, Michaela Brunner, Michael Gruber, Johanna Baehr, Georg Sigl |
| 2024 | On the Fault Tolerance of Self-Supervised Training in Convolutional Neural Networks. | Rosario Milazzo, Vincenzo De Marco, Corrado De Sio, Sophie M. Fosson, Lia Morra, Luca Sterpone |
| 2024 | Interface Protection Against Transient Faults. | Jn Mach, Luks Kohtka, Pavel Cick |
| 2024 | An Efficient High-level Synthesis Implementation of the MUSIC DoA Algorithm for FPGA. | Sakari Lahti, Tuomas Aaltonen, Elizaveta Rastorgueva-Foi, Jukka Talvitie, Bo Tan, Timo D. Hmlinen |
| 2024 | TCC: GPGPU Architecture for Instruction Decoder and Control Flow Error Detection. | Raghunandana K. K, Yogesh Prasad K. R, Matteo Sonza Reorda, Virendra Singh |
| 2024 | Exploring Quantization and Mapping Synergy in Hardware-Aware Deep Neural Network Accelerators. | Jan Klhufek, Miroslav Safar, Vojtech Mrazek, Zdenek Vascek, Luks Sekanina |
| 2024 | QDI Binary Comparator Networks and their Application in Combinational Logic. | Florian Huemer |
| 2024 | Constant Voltage Maximum Power Point Tracking Method for Fully Integrated Solar-Powered Energy Harvester. | Adam Hudec, Rbert Ondica, Richard Ravasz, Viera Stopjakov |
| 2024 | ABACUS: ASIP-Based Avro Schema-Customizable Parser Acceleration on FPGAs. | Tobias Hahn, Daniel Schll, Stefan Wildermann, Jrgen Teich |
| 2024 | The Impact of Well-Edge Proximity Effect on PMOS Threshold Voltage in Various Submicron CMOS Technologies. | Marika Grochowska, Witold A. Pleskacz |
| 2024 | Xoodyak Under SCA Siege. | Parisa Amiri-Eliasi, Silvia Mella, Lo Weissbart, Lejla Batina, Stjepan Picek |
| 2024 | Evaluating the Reliability of Integer Multipliers With Respect to Permanent Faults. | Nikolaos Ioannis Deligiannis, Riccardo Cantoro, Matteo Sonza Reorda, Serag E.-D. Habib |
| 2024 | A New Reliability Analysis of RISC-V Soft Processor for Safety-Critical Systems. | Giorgio Cora, Corrado De Sio, Daniele Rizzieri, Sarah Azimi, Luca Sterpone |
| 2024 | An Efficient Approach for STLs Development of Automotive SoCs Using Colored Petri Nets. | Ernesto Cristopher Villegas Castillo, Felipe Augusto da Silva, Michael Gla |
| 2024 | Hardware Honeypot: Setting Sequential Reverse Engineering on a Wrong Track. | Michaela Brunner, Hye-Hyun Lee, Alexander Hepp, Johanna Baehr, Georg Sigl |
| 2024 | A ML-Based Approach for Finding the Product Definition Space of Microelectronic Power Switches. | Seyedbehnam Beladi, Linus Maurer, Jonas Stricker, Georg Pelz |
| 2024 | Choose your Path: Control of Ring Oscillators EMFI Susceptibility through FPGA P&R Constraints. | Sami El Amraoui, Rgis Leveugle, Paolo Maistri |
| 2023 | A Configurable Mixed-Precision Convolution Processing Unit Generator in Chisel. | Jure Vreca, Anton Biasizzo |