| 2010 | Instantiating GENESYS Application Architecture Modeling via UML 2.0 Constructs and MARTE Profile. | Subayal Khan, Kari Tiensyrj, Jari Nurmi |
| 2010 | Low Latency Recovery from Transient Faults for Pipelined Processor Architectures. | Marcus Jeitler, Jakob Lechner |
| 2010 | Real-Time Testing of True Random Number Generators Through Dynamic Reconfiguration. | Dan Hotoleanu, Octavian Cret, Alin Suciu, Tamas Gyrfi, Lucia Vacariu |
| 2010 | Software Managed Instruction Scratchpad Memory Optimization in Stream Architecture Based on Hot Code Analysis of Kernels. | Yi He, Ju Ren, Mei Wen, Qianming Yang, Nan Wu, Chunyuan Zhang |
| 2010 | Architectural Vulnerability Factor Estimation with Backwards Analysis. | Robert Hartl, Andreas J. Rohatschek, Walter Stechele, Andreas Herkersdorf |
| 2010 | Composable Dynamic Voltage and Frequency Scaling and Power Management for Dataflow Applications. | Kees Goossens, Dongrui She, Aleksandar Milutinovic, Anca Mariana Molnos |
| 2010 | ALOE-Based Flexible LDPC Decoder. | Ismael Gmez, Massimo Camatel, Jordi Bracke, Vuk Marojevic, Antoni Gelonch, Fabrizio Vacca, Guido Masera |
| 2010 | A Load-Forwarding Mechanism for the Vector Architecture in Multimedia Applications. | Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi |
| 2010 | Exploration of Network Alternatives for Middleware-centric Embedded System Design. | Franco Fummi, Giovanni Perbellini, Davide Quaglia, R. Trenti |
| 2010 | RobuCheck: A Robustness Checker for Digital Circuits. | Stefan Frehse, Grschwin Fey, Andr Slflow, Rolf Drechsler |
| 2010 | Re-NUCA: Boosting CMP Performance Through Block Replication. | Pierfrancesco Foglia, Cosimo Antonio Prete, Marco Solinas, Giovanna Monni |
| 2010 | System Level Hardening by Computing with Matrices. | Ronaldo Rodrigues Ferreira, lvaro Freitas Moreira, Luigi Carro |
| 2010 | Optimising Self-Timed FPGA Circuits. | Phillip David Ferguson, Aristides Efthymiou, Tughrul Arslan, Danny Hume |
| 2010 | A Fast Analytical Approach to Multi-cycle Soft Error Rate Estimation of Sequential Circuits. | Mahdi Fazeli, Seyed Ghassem Miremadi, Hossein Asadi, Mehdi Baradaran Tahoori |
| 2010 | Persistence Management Model for Dynamically Reconfigurable Hardware. | Julio Dondo, Fernando Rincn, Jess Barba, Francisco Moya, Francisco Snchez, Juan Carlos Lpez |
| 2010 | A Multicore Embedded Processor for Fingerprint Recognition. | Giovanni Danese, Mauro Giachero, Francesco Leporati, Nelson Nazzicari |
| 2010 | Trading Hardware Overhead for Communication Performance in Mesh-Type Topologies. | Claas Cornelius, Philipp Gorski, Stephan Kubisch, Dirk Timmermann |
| 2010 | A Memetic Approach for Nanoscale Hybrid Circuit Cell Mapping. | Zhufei Chu, Yinshui Xia, William N. N. Hung, Lun-Yao Wang, Xiaoyu Song |
| 2010 | Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis. | Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jean-Luc Dekeyser |
| 2010 | On CMOS Memory Design in Low Supply Voltage for Integrated Biosensor Applications. | Allen Chen, Ryan Hoppal, Tom Chen |
| 2010 | Power Consumption Modeling for DVFS Exploitation. | Andrea Castagnetti, Ccile Belleudy, Sbastien Bilavarn, Michel Auguin |
| 2010 | A Markov Model for Low-Power High-Fidelity Design-Space Exploration. | Jing Cao, Albert Nymeyer |
| 2010 | Adaptive Beamforming Using the Reconfigurable MONTIUM TP. | Marcel D. van de Burgwal, Kenneth C. Rovers, Koen C. H. Blom, Andr B. J. Kokkeler, Gerard J. M. Smit |
| 2010 | Filtering Directory Lookups in CMPs. | Ana Bosque, Vctor Vials, Pablo Ibez, Jos M. Llabera |
| 2010 | Faults Coverage Improvement Based on Fault Simulation and Partial Duplication. | Jaroslav Boreck, Martin Kohlk, Hana Kubtov, Pavel Kubalk |