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Euromicro Conference Series on Digital System Design

DSD

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering · Distributed Computing and Systems Software

Papers indexed

2,448

2001–2025

Papers per year

2001136 peak2025

DSD papers

2,448 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2008A Reconfigurable LFSR for Tri-standard SDR Transceiver, Architecture and Complexity Analysis.Laurent Alaus, Dominique Noguet, Jacques Palicot
2008Using Empirical Science to Engineer Systems: Optimizing Cache for Power and Performance.Ahmed Abdallah, Wayne H. Wolf, Graham R. Hellestrand
2007Secure, Real-Time and Multi-Threaded General-Purpose Embedded Java Microarchitecture.Martin Zabel, Thomas B. Preuer, Peter Reichel, Rainer G. Spallek
2007FPGA Accelerating Algorithms of Active Shape Model in People Tracking Applications.Jinbo Xu, Yong Dou, Junfeng Li, Xingming Zhou, Qiang Dou
2007Controller Design and Verification for A Pipeline Image Processor based on An Extended Petri net.Katsumi Wasaki, Toshiaki Harai, Tamotsu Hayashi, Ken-ichi Arai
2007Cotransformation Provides Area and Accuracy Improvement in an HDL Library for LNS Subtraction.Panagiotis D. Vouzis, Caroline Collange, Mark G. Arnold
2007Timing- / Power-Optimization for Digital Logic Based on Standard Cells.Heinrich Theodor Vierhaus, Helmut Rossmann, Silvio Misera
2007An Efficient BIST Scheme for Non-Restoring Array Dividers.Haridimos T. Vergos
2007Fault Diagnosis in Integrated Circuits with BIST.Raimund Ubar, Sergei Kostin, Jaan Raik, Teet Evartson, Harri Lensen
2007An Implementation of an Address Generator Using Hash Memories.Tsutomu Sasao, Munehiro Matsuura
2007Online Protocol Testing for FPGA Based Fault Tolerant Systems.Jiri Tobola, Zdenek Kotsek, Jan Korenek, Toms Martnek, Martin Straka
2007Safety and Security-driven Design of Networked Embedded Systems.Miroslav Svda, Roman Trchalk
2007Reducing the Overhead of Real-Time Operating System through Reconfigurable Hardware.Moonvin Song, Sang Hoon Hong, Yunmo Chung
2007Testability Analysis Based on the Identification of Testable Blocks with Predefined Properties.Jaroslav Skarvada, Tomas Herrman, Zdenek Kotsek
2007Functional Verification of RTL Designs driven by Mutation Testing metrics.Youssef Serrestou, Vincent Beroulle, Chantal Robach
2007An efficient and optimized FPGA Feedback M-PSK Symbol Timing Recovery Architecture based on the Gardner Timing Error Detector.Emanuele Sciagura, Paolo Zicari, Stefania Perri, Pasquale Corsonello
2007Fully Adaptive Fault-Tolerant Routing Algorithm for Network-on-Chip Architectures.Timo Schnwald, Jochen Zimmermann, Oliver Bringmann, Wolfgang Rosenstiel
2007Analysis of Variable Reordering on the QMDD Representation of Quantum Circuits.Sharon Van Schaick, Kenneth B. Kent
2007On network-on-chip comparison.Erno Salminen, Ari Kulmala, Timo D. Hmlinen
2007Fault Handling in FPGAs and Microcontrollers in Safety-Critical Embedded Applications: A Comparative Survey.Falk Salewski, Adam Taylor
2007An Efficient Intra Prediction Hardware Architecture for H.264 Video Decoding.Esra Sahin, Ilker Hamzaoglu
2007Algebraic Characterization of CNOT-Based Quantum Circuits with its Applications on Logic Synthesis.Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi
2007Test Controller Synthesis Constrained by Circuit Testability Analysis.Richard Ruzicka, Josef Strnadel
2007On-Chip Cache Device Scaling Limits and Effective Fault Repair Techniques in Future Nanoscale Technology.David Roberts, Nam Sung Kim, Trevor N. Mudge
2007A Statistical Model for Estimating the Effect of Process Variations on Delay and Slew Metrics for VLSI Interconnects.J. V. R. Ravindra, M. B. Srinivas
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