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IEEE Symposium on Field Programmable Custom Computing Machines

FCCM

National

CORE rank

CORE rank (raw)

National/Regional

Fields of research

Computer Systems Engineering · Distributed Computing and Systems Software

Papers indexed

1,692

1995–2026

Papers per year

199570 peak2026

FCCM papers

1,692 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2019Why Compete When You Can Work Together: FPGA-ASIC Integration for Persistent RNNs.Eriko Nurvitadhi, Dongup Kwon, Ali Jafari, Andrew Boutros, Jaewoong Sim, Phillip Tomson, Huseyin Sumbul, Gregory K. Chen, Phil C. Knag, Raghavan Kumar, Ram Krishnamurthy, Sergey Gribok, Bogdan Pasca, Martin Langhammer, Debbie Marr, Aravind Dasu
2019Flexi-AES: A Highly-Parameterizable Cipher for a Wide Range of Design Constraints.Sergiu Mosanu, Xinfei Guo, Mohamed El-Hadedy, Lorena Anghel, Mircea Stan
2019Rethinking Integer Divider Design for FPGA-Based Soft-Processors.Eric Matthews, Alec Lu, Zhenman Fang, Lesley Shannon
2019Enhancing Butterfly Fat Tree NoCs for FPGAs with Lightweight Flow Control.Gurshaant Singh Malik, Nachiket Kapre
2019An Efficient Hardware Accelerator for Sparse Convolutional Neural Networks on FPGAs.Liqiang Lu, Jiaming Xie, Ruirui Huang, Jiansong Zhang, Wei Lin, Yun Liang
2019Towards Efficient Deep Neural Network Training by FPGA-Based Batch-Level Parallelism.Cheng Luo, Man-Kit Sit, Hongxiang Fan, Shuanglong Liu, Wayne Luk, Ce Guo
2019A High Throughput and Energy-Efficient Retina-Inspired Tone Mapping Processor.Lili Liu, Xiaoqiang Xiang, Yuxiang Xie, Yongjie Li, Bo Yan, Jun Zhou
2019RapidRoute: Fast Assembly of Communication Structures for FPGA Overlays.Leo Liu, Jay Weng, Nachiket Kapre
2019Large-Scale and High-Throughput QR Decomposition on an FPGA.Dajung Lee, Andrei Hagiescu, Dan Pritsker
2019High Precision, High Performance FPGA Adders.Martin Langhammer, Bogdan Pasca, Gregg Baeckler
2019A 4.8x Faster FPGA-Based Iterative Closest Point Accelerator for Object Pose Estimation of Picking Robot Applications.Atsutake Kosuge, Keisuke Yamamoto, Yukinori Akamine, Taizo Yamawaki, Takashi Oshima
2019FlexGibbs: Reconfigurable Parallel Gibbs Sampling Accelerator for Structured Graphs.Glenn G. Ko, Yuji Chai, Rob A. Rutenbar, David Brooks, Gu-Yeon Wei
2019Wire-Speed Multirate Accelerator for Aggregation Operations on Sorted Data.Sang-Woo Jun, Arvind Arvind
2019OpenCL Kernel Vectorization on the CPU, GPU, and FPGA: A Case Study with Frequent Pattern Compression.Zheming Jin, Hal Finkel
2019Exploring the Random Network of Hodgkin and Huxley Neurons with Exponential Synaptic Conductances on OpenCL FPGA Platform.Zheming Jin, Hal Finkel
2019SimAcc: A Configurable Cycle-Accurate Simulator for Customized Accelerators on CPU-FPGAs SoCs.Konstantinos Iordanou, Oscar Palomar, John Mawer, Cosmin Gorgovan, Andy Nisbet, Mikel Lujn
2019SparseHD: Algorithm-Hardware Co-optimization for Efficient High-Dimensional Computing.Mohsen Imani, Sahand Salamat, Behnam Khaleghi, Mohammad Samragh, Farinaz Koushanfar, Tajana Rosing
2019FASE: FPGA Acceleration of Secure Function Evaluation.Siam U. Hussain, Farinaz Koushanfar
2019Improved Techniques for Sensing Intra-Device Side Channel Leakage.William Hunter, Christopher McCarty, Lee Lerner
2019AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning.Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
2019Hardware Acceleration of Long Read Pairwise Overlapping in Genome Sequencing: A Race Between FPGA and GPU.Licheng Guo, Jason Lau, Zhenyuan Ruan, Peng Wei, Jason Cong
2019Maverick: A Stand-Alone CAD Flow for Partially Reconfigurable FPGA Modules.Dallon Glick, Jesse Grigg, Brent E. Nelson, Michael J. Wirthlin
2019Cost-Effective Energy Monitoring of a Zynq-Based Real-Time System Including Dual Gigabit Ethernet.Martin Geier, Dominik Faller, Marian Brndle, Samarjit Chakraborty
2019SimBNN: A Similarity-Aware Binarized Neural Network Acceleration Framework.Cheng Fu, Shilin Zhu, Huili Chen, Farinaz Koushanfar, Hao Su, Jishen Zhao
2019A Fine-Grained Parallel Snappy Decompressor for FPGAs Using a Relaxed Execution Model.Jian Fang, Jianyu Chen, Jinho Lee, Zaid Al-Ars, H. Peter Hofstee
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