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IEEE Symposium on Field Programmable Custom Computing Machines

FCCM

National

CORE rank

CORE rank (raw)

National/Regional

Fields of research

Computer Systems Engineering · Distributed Computing and Systems Software

Papers indexed

1,692

1995–2026

Papers per year

199570 peak2026

FCCM papers

1,692 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2019Generic Connectivity-Based CGRA Mapping via Integer Linear Programming.Matthew J. P. Walker, Jason Helge Anderson
2019Memory Mapping for Multi-die FPGAs.Nils Voss, Pablo Quintana, Oskar Mencer, Wayne Luk, Georgi Gaydadjiev
2019CRoute: A Fast High-Quality Timing-Driven Connection-Based FPGA Router.Dries Vercruyce, Elias Vansteenkiste, Dirk Stroobandt
2019LAMDA: Learning-Assisted Multi-stage Autotuning for FPGA Design Closure.Ecenur Ustun, Shaojie Xiang, Jinny Gui, Cunxi Yu, Zhiru Zhang
2019Templatised Soft Floating-Point for High-Level Synthesis.David B. Thomas
2019Impact of FPGA Architecture on Area and Performance of CGRA Overlays.Ian Taras, Jason Helge Anderson
2019Compressed Sensing MRI Reconstruction on Intel HARPv2.Yushan Su, Michael Anderson, Jonathan I. Tamir, Michael Lustig, Kai Li
2019T2S-Tensor: Productively Generating High-Performance Spatial Hardware for Dense Tensor Computations.Nitish Kumar Srivastava, Hongbo Rong, Prithayan Barua, Guanyu Feng, Huanqi Cao, Zhiru Zhang, David H. Albonesi, Vivek Sarkar, Wenguang Chen, Paul Petersen, Geoff Lowney, Adam Herr, Christopher J. Hughes, Timothy G. Mattson, Pradeep Dubey
2019Automated Design Space Exploration and Roofline Analysis for FPGA-Based HLS Applications.Marco Siracusa, Marco Rabozzi, Emanuele Del Sozzo, Marco D. Santambrogio, Lorenzo Di Tucci
2019Module-per-Object: A Human-Driven Methodology for C++-Based High-Level Synthesis Design.Jeferson Santiago da Silva, Franois-Raymond Boyer, J. M. Pierre Langlois
2019Raparo: Resource-Level Angle-Based Parallel Routing for FPGAs.Minghua Shen, Nong Xiao
2019Fast Voltage Transients on FPGAs: Impact and Mitigation Strategies.Linda L. Shen, Ibrahim Ahmed, Vaughn Betz
2019Sonar: Writing Testbenches through Python.Varun Sharma, Naif Tarafdar, Paul Chow
2019Yosys+nextpnr: An Open Source Framework from Verilog to Bitstream for Commercial FPGAs.David Shah, Eddie Hung, Clifford Wolf, Serge Bazanski, Dan Gisselquist, Miodrag Milanovic
2019PIR-DSP: An FPGA DSP Block Architecture for Multi-precision Deep Neural Networks.Seyedramin Rasoulinezhad, Hao Zhou, Lingli Wang, Philip H. W. Leong
2019An OpenCL-Based Acceleration for Canny Algorithm Using a Heterogeneous CPU-FPGA Platform.Samah Rahamneh, Lina Sawalha
2019π-BA: Bundle Adjustment Acceleration on Embedded FPGAs with Co-observation Optimization.Shuzhen Qin, Qiang Liu, Bo Yu, Shaoshan Liu
2019An FPGA-Based BWT Accelerator for Bzip2 Data Compression.Weikang Qiao, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong
2019Analyzing the Energy-Efficiency of Vision Kernels on Embedded CPU, GPU and FPGA Platforms.Murad Qasaimeh, Joseph Zambreno, Phillip H. Jones, Kristof Denolf, Jack Lo, Kees A. Vissers
2019Monobit Wideband Receiver with Integrated Dithering in FPGA.Dan Pritsker, Colman Cheung
2019EFCAD - An Embedded FPGA CAD Tool Flow for Enabling On-chip Self-Compilation.Khoa Dang Pham, Malte Vesper, Dirk Koch, Eddie Hung
2019Active Stereo Vision with High Resolution on an FPGA.Marc Pfeifer, Philipp M. Scholl, Rainer Voigt, Bernd Becker
2019Automated Acceleration of Dataflow-Oriented C Applications on FPGA-Based Systems.Francesco Peverelli, Marco Rabozzi, Salvatore Cardamone, Emanuele Del Sozzo, Alex J. W. Thom, Marco D. Santambrogio, Lorenzo Di Tucci
2019Towards Prototyping and Acceleration of Java Programs onto Intel FPGAs.Michail Papadimitriou, Juan Fumero, Athanasios Stratikopoulos, Christos Kotselidis
2019Hybrid XML Parser Based on Software and Hardware Co-design.Zhe Pan, Xiaohong Jiang, Jian Wu, Xiang Li
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