| 2020 | FPGA Implementation of Post-Quantum DME Cryptosystem. | Jos Luis Imaa, Ignacio Luengo |
| 2020 | FP-AMG: FPGA-Based Acceleration Framework for Algebraic Multigrid Solvers. | Pouya Haghi, Tong Geng, Anqi Guo, Tianqi Wang, Martin C. Herbordt |
| 2020 | An Analytical Model of Memory-Bound Applications Compiled with High Level Synthesis. | Maria Angelica Davila Guzman, Ruben Gran Tejero, Mara Villarroya-Gaud, Daro Surez Gracia |
| 2020 | Corundum: An Open-Source 100-Gbps Nic. | Alex Forencich, Alex C. Snoeren, George Porter, George Papen |
| 2020 | Gbit/s Non-Binary LDPC Decoders: High-Throughput using High-Level Specifications. | Oscar Ferraz, Srinivasan Subramaniyan, Guohui Wang, Joseph R. Cavallaro, Gabriel Falco, Madhura Purnaprajna |
| 2020 | Low-Cost Approximate Constant Coefficient Hybrid Binary-Unary Multiplier for DSP Applications. | S. Rasoul Faraji, Pierre Abillama, Kia Bazargan |
| 2020 | A Quaternary FPGA Architecture Using Floating Gate Memories. | Ayokunle Fadamiro, Pouyan Rezaie, Christopher Harris, Spencer K. Millican |
| 2020 | Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing. | Akshay Dua, Yixing Li, Fengbo Ren |
| 2020 | Automatic Generation of FPGA Kernels From Open Format CNN Models. | Dimitrios Danopoulos, Christoforos Kachris, Dimitrios Soudris |
| 2020 | Explore Efficient LUT-based Architecture for Quantized Convolutional Neural Networks on FPGA. | Yanpeng Cao, Chengcheng Wang, Yongming Tang |
| 2020 | Designing Domain Specific Computing Systems. | Anthony M. Cabrera, Roger D. Chamberlain |
| 2020 | RISC-V Barrel Processor for Accelerator Control. | MohammadHossein AskariHemmat, Olexa Bilaniuk, Sean Wagner, Yvon Savaria, Jean-Pierre David |
| 2020 | Proposing a Fast and Scalable Systolic Array for Matrix Multiplication. | Bahar Asgari, Ramyad Hadidi, Hyesoon Kim |
| 2020 | Investigating Performance Losses in High-Level Synthesis for Stencil Computations. | Wesson Altoyan, Juan J. Alonso |
| 2020 | Fast Arithmetic Hardware Library For RLWE-Based Homomorphic Encryption. | Rashmi S. Agrawal, Lake Bu, Michel A. Kinsy |
| 2019 | MEG: A RISCV-Based System Simulation Infrastructure for Exploring Memory Optimization Using FPGAs and Hybrid Memory Cube. | Jialiang Zhang, Yang Liu, Gaurav Jain, Yue Zha, Jonathan Ta, Jing Li |
| 2019 | An FPGA-Based Computing Infrastructure Tailored to Efficiently Scaffold Genome Sequences. | Alberto Zeni, Matteo Crespi, Lorenzo Di Tucci, Marco D. Santambrogio |
| 2019 | Automated Tool and Runtime Support for Fine-Grain Reconfiguration in Highly Flexible Reconfigurable Systems. | Rafael Zamacola, Alberto Garca-Martnez, Javier Mora, Andrs Otero, Eduardo de la Torre |
| 2019 | Model-Extraction Attack Against FPGA-DNN Accelerator Utilizing Correlation Electromagnetic Analysis. | Kota Yoshida, Takaya Kubota, Mitsuru Shiozaki, Takeshi Fujino |
| 2019 | A Scalable OpenCL-Based FPGA Accelerator for YOLOv2. | Ke Xu, Xiaoyun Wang, Dong Wang |
| 2019 | GhostSZ: A Transparent FPGA-Accelerated Lossy Compression Framework. | Qingqing Xiong, Rushi Patel, Chen Yang, Tong Geng, Anthony Skjellum, Martin C. Herbordt |
| 2019 | KPynq: A Work-Efficient Triangle-Inequality Based K-Means on FPGA. | Yuke Wang, Zhaorui Zeng, Boyuan Feng, Lei Deng, Yufei Ding |
| 2019 | Processor Assisted Worklist Scheduling for FPGA Accelerated Graph Processing on a Shared-Memory Platform. | Yu Wang, James C. Hoe, Eriko Nurvitadhi |
| 2019 | FP-AMR: A Reconfigurable Fabric Framework for Adaptive Mesh Refinement Applications. | Tianqi Wang, Tong Geng, Xi Jin, Martin C. Herbordt |
| 2019 | LUTNet: Rethinking Inference in FPGA Soft Logic. | Erwei Wang, James J. Davis, Peter Y. K. Cheung, George A. Constantinides |