| 2019 | A FPGA Implementation of Farneback Optical Flow by High-Level Synthesis. | Chia-Wei Chang, Zi-Qi Zhong, Jing-Jia Liou |
| 2019 | Efficient and Effective Sparse LSTM on FPGA with Bank-Balanced Sparsity. | Shijie Cao, Chen Zhang, Zhuliang Yao, Wencong Xiao, Lanshun Nie, De-chen Zhan, Yunxin Liu, Ming Wu, Lintao Zhang |
| 2019 | Math Doesn't Have to be Hard: Logic Block Architectures to Enhance Low-Precision Multiply-Accumulate on FPGAs. | Andrew Boutros, Mohamed Eldafrawy, Sadegh Yazdanshenas, Vaughn Betz |
| 2019 | FASED: FPGA-Accelerated Simulation and Evaluation of DRAM. | David Biancolin, Sagar Karandikar, Donggyu Kim, Jack Koenig, Andrew Waterman, Jonathan Bachrach, Krste Asanovic |
| 2019 | Substream-Centric Maximum Matchings on FPGA. | Maciej Besta, Marc Fischer, Tal Ben-Nun, Johannes de Fine Licht, Torsten Hoefler |
| 2019 | BRISC-V: An Open-Source Architecture Design Space Exploration Toolbox. | Sahan Bandara, Alan Ehret, Donato Kava, Michel A. Kinsy |
| 2019 | An Energy-Efficient FPGA Implementation of an LSTM Network Using Approximate Computing. | Elham Azari, Aykut Dengi, Sarma B. K. Vrudhula |
| 2019 | Stop Crying Over Your Cache Miss Rate: Handling Efficiently Thousands of Outstanding Misses in FPGAs. | Mikhail Asiatici, Paolo Ienne |
| 2018 | Combined Spatial and Temporal Blocking for High-Performance Stencil Computation on FPGAs Using OpenCL. | Hamid Reza Zohouri, Artur Podobas, Satoshi Matsuoka |
| 2018 | FASTCF: FPGA-based Accelerator for STochastic-Gradient-Descent-based Collaborative Filtering. | Shijie Zhou, Rajgopal Kannan, Yu Min, Viktor K. Prasanna |
| 2018 | Rosetta: A Realistic High-Level Synthesis Benchmark Suite for Software Programmable FPGAs. | Yuan Zhou, Udit Gupta, Steve Dai, Ritchie Zhao, Nitish Kumar Srivastava, Hanchen Jin, Joseph Featherston, Yi-Hsiang Lai, Gai Liu, Gustavo Angarita Velasquez, Wenping Wang, Zhiru Zhang |
| 2018 | Automatic Optimising CNN with Depthwise Separable Convolution on FPGA: (Abstact Only). | Ruizhe Zhao, Xinyu Niu, Wayne Luk |
| 2018 | Mapping Large-Scale DNNs on Asymmetric FPGAs: (Abstract Only). | Wentai Zhang, Jiaxi Zhang, Minghua Shen, Nong Xiao, Guojie Luo |
| 2018 | Degree-aware Hybrid Graph Traversal on FPGA-HMC Platform. | Jialiang Zhang, Jing Li |
| 2018 | Liquid Silicon: A Data-Centric Reconfigurable Architecture Enabled by RRAM Technology. | Yue Zha, Jing Li |
| 2018 | A Framework for Generating High Throughput CNN Implementations on FPGAs. | Hanqing Zeng, Ren Chen, Chi Zhang, Viktor K. Prasanna |
| 2018 | Performance Comparison of Multiples and Target Detection with Imager-driven Processing Mode for Ultrafast-Imager: (Abstract Only). | Xiaoyu Yu, Dong Ye |
| 2018 | Domino: An Asynchronous and Energy-efficient Accelerator for Graph Processing: (Abstract Only). | Chongchong Xu, Chao Wang, Yiwei Zhang, Lei Gong, Xi Li, Xuehai Zhou |
| 2018 | Architecture and Circuit Design of an All-Spintronic FPGA. | Stephen M. Williams, Mingjie Lin |
| 2018 | C-LSTM: Enabling Efficient LSTM using Structured Compression Techniques on FPGAs. | Shuo Wang, Zhe Li, Caiwen Ding, Bo Yuan, Qinru Qiu, Yanzhi Wang, Yun Liang |
| 2018 | Design of an MTJ-Based Nonvolatile LUT Circuit with a Data-Update Minimized Shift Operation for an Ultra-Low-Power FPGA: (Abstract Only). | Daisuke Suzuki, Takahiro Hanyu |
| 2018 | Solving Satisfiability Problem on Quantum Annealer: A Lesson from FPGA CAD Tools: (Abstract Only). | Juexiao Su, Lei He |
| 2018 | Scalable Window Generation for the Intel Broadwell+Arria 10 and High-Bandwidth FPGA Systems. | Greg Stitt, Abhay Gupta, Madison N. Emas, David Wilson, Austin Baylis |
| 2018 | A FPGA Friendly Approximate Computing Framework with Hybrid Neural Networks: (Abstract Only). | Haiyue Song, Xiang Song, Tianjian Li, Hao Dong, Naifeng Jing, Xiaoyao Liang, Li Jiang |
| 2018 | P4-Compatible High-Level Synthesis of Low Latency 100 Gb/s Streaming Packet Parsers in FPGAs. | Jeferson Santiago da Silva, Franois-Raymond Boyer, J. M. Pierre Langlois |