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ACM Int'l Symposium on Field Programmable Gate Arrays

FPGA

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

1,710

1992–2026

Papers per year

199294 peak2026

FPGA papers

1,710 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2018BoxPlacer: Force Directed-Based Timing-Driven Placement for Large-Scale FPGAs: (Abstract Only).Minghua Shen, Jiaxi Zhang, Nong Xiao, Guojie Luo
2018Towards Serial-Equivalent Parallel Routing for FPGAs: (Abstract Only).Minghua Shen, Wentai Zhang, Nong Xiao, Guojie Luo
2018Towards a Uniform Template-based Architecture for Accelerating 2D and 3D CNNs on FPGA.Junzhong Shen, You Huang, Zelong Wang, Yuran Qiao, Mei Wen, Chunyuan Zhang
2018Memory-Efficient Fast Fourier Transform on Streaming Data by Fusing Permutations.Franois Serre, Markus Pschel
2018CausaLearn: Automated Framework for Scalable Streaming-based Causal Bayesian Learning using FPGAs.Bita Darvish Rouhani, Mohammad Ghasemzadeh, Farinaz Koushanfar
2018High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms: (Abstract Only).Weikang Qiao, Jieqiong Du, Zhenman Fang, Libo Wang, Michael Lo, Mau-Chung Frank Chang, Jason Cong
2018In-Package Domain-Specific ASICs for Intel Stratix 10 FPGAs: A Case Study of Accelerating Deep Learning Using TensorTile ASIC(Abstract Only).Eriko Nurvitadhi, Jeffrey J. Cook, Asit K. Mishra, Debbie Marr, Kevin Nealis, Philip Colangelo, Andrew C. Ling, Davor Capalija, Utku Aydonat, Sergey Y. Shumarayev, Aravind Dasu
2018ADAM: Automated Design Analysis and Merging for Speeding up FPGA Development.Ho-Cheung Ng, Shuanglong Liu, Wayne Luk
2018A Lightweight YOLOv2: A Binarized CNN with A Parallel Support Vector Regression for an FPGA.Hiroki Nakahara, Haruyoshi Yonekawa, Tomoya Fujii, Shimpei Sato
2018A Customizable Matrix Multiplication Framework for the Intel HARPv2 Xeon+FPGA Platform: A Deep Learning Case Study.Duncan J. M. Moss, Krishnan Srivatsan, Eriko Nurvitadhi, Piotr Ratuszniak, Chris Johnson, Jaewoong Sim, Asit K. Mishra, Debbie Marr, Suchit Subhaschandra, Philip Heng Wai Leong
2018Routing Magic: Performing Computations Using Routing Networks and Voting Logic on Unary Encoded Data.Soheil Mohajer, Zhiheng Wang, Kia Bazargan
2018A Self-adaptation Method of Fitting Convolutional Neural Network into FPGA: Abstract Only).Ning Mao, Zhihong Huang, Xing Wei, He Zhao, Xinkai Di, Le Yu, Haigang Yang
2018DATuner: An Extensible Distributed Autotuning Framework for FPGA Design and Design Automation: (Abstract Only).Gai Liu, Ecenur Ustun, Shaojie Xiang, Chang Xu, Guojie Luo, Zhiru Zhang
2018A Low-Power Deconvolutional Accelerator for Convolutional Neural Network Based Segmentation on FPGA: Abstract Only.Shuanglong Liu, Xinyu Niu, Wayne Luk
2018High-Performance QR Decomposition for FPGAs.Martin Langhammer, Bogdan Pasca
2018Continuous Skyline Computation Accelerator with Parallelizing Dominance Relation Calculations: (Abstract Only).Kenichi Koizumi, Kei Hiraki, Mary Inaba
2018Accelerating Graph Analytics by Co-Optimizing Storage and Access on an FPGA-HMC Platform.Soroosh Khoram, Jialiang Zhang, Maxwell Strange, Jing Li
2018FastTrack: Exploiting Fast FPGA Wiring for Implementing NoC Shortcuts (Abstract Only).Nachiket Kapre, Tushar Krishna
2018Dynamically Scheduled High-level Synthesis.Lana Josipovic, Radhika Ghosal, Paolo Ienne
2018Optimizations of Sequence Alignment on FPGA: A Case Study of Extended Sequence Alignment (Abstact Only).Zheming Jin, Kazutomo Yoshii
2018Evaluation of OpenCL Performance-oriented Optimizations for Streaming Kernels on the FPGA: (Abstract Only).Zheming Jin, Hal Finkel
2018Architecture Exploration for HLS-Oriented FPGA Debug Overlays.Al-Shahna Jamal, Jeffrey Goeders, Steven J. E. Wilton
2018HexCell: a Hexagonal Cell for Evolvable Systolic Arrays on FPGAs: (Abstract Only).Fady Hussein, Luka Daoud, Nader Rafla
2018ParaDRo: A Parallel Deterministic Router Based on Spatial Partitioning and Scheduling.Chin Hau Hoo, Akash Kumar
2018LEOSoC: An Open-Source Cross-Platform Embedded Linux Library for Managing Hardware Accelerators in Heterogeneous System-on-Chips(Abstract Only).Andrea Guerrieri, Sahand Kashani-Akhavan, Mikhail Asiatici, Pasquale Lombardi, Bilel Belhadj, Paolo Ienne
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