Skip to content

ACM Int'l Symposium on Field Programmable Gate Arrays

FPGA

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

1,710

1992–2026

Papers per year

199294 peak2026

FPGA papers

1,710 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2017Boosting the Performance of FPGA-based Graph Processor using Hybrid Memory Cube: A Case for Breadth First Search.Jialiang Zhang, Soroosh Khoram, Jing Li
2017Learning Convolutional Neural Networks for Data-Flow Graph Mapping on Spatial Programmable Architectures (Abstract Only).Shouyi Yin, Dajiang Liu, Lifeng Sun, Xinhan Lin, Leibo Liu, Shaojun Wei
2017Measuring the Power-Constrained Performance and Energy Gap between FPGAs and Processors (Abstract Only).Andy Gean Ye, Karthik Ganesan
2017Don't Forget the Memory: Automatic Block RAM Modelling, Optimization, and Architecture Exploration.Sadegh Yazdanshenas, Kosuke Tatsumura, Vaughn Betz
2017Automatic Construction of Program-Optimized FPGA Memory Networks.Hsin-Jung Yang, Kermin Fleming, Felix Winterstein, Annie I. Chen, Michael Adler, Joel S. Emer
2017A Parallel Bandit-Based Approach for Autotuning FPGA Compilation.Chang Xu, Gai Liu, Ritchie Zhao, Stephen Yang, Guojie Luo, Zhiru Zhang
2017GRT 2.0: An FPGA-based SDR Platform for Cognitive Radio Networks (Abstract Only).Haoyang Wu, Tao Wang, Zhiwei Li, Boyan Ding, Xiaoguang Li, Tianfu Jiang, Jun Liu, Songwu Lu
2017Energy Efficient Scientific Computing on FPGAs using OpenCL.Dennis Weller, Fabian Oboril, Dimitar Lukarski, Jrgen Becker, Mehdi Baradaran Tahoori
2017A Framework for Iterative Stencil Algorithm Synthesis on FPGAs from OpenCL Programming Model (Abstract Only).Shuo Wang, Yun Liang
2017fpgaConvNet: Automated Mapping of Convolutional Neural Networks on FPGAs (Abstract Only).Stylianos I. Venieris, Christos-Savvas Bouganis
2017FINN: A Framework for Fast, Scalable Binarized Neural Network Inference.Yaman Umuroglu, Nicholas J. Fraser, Giulio Gambardella, Michaela Blott, Philip Heng Wai Leong, Magnus Jahre, Kees A. Vissers
2017Enabling Flexible Network FPGA Clusters in a Heterogeneous Cloud Data Center.Naif Tarafdar, Thomas Lin, Eric Fukuda, Hadi Bannazadeh, Alberto Leon-Garcia, Paul Chow
2017Accelerating Face Detection on Programmable SoC Using C-Based Synthesis.Nitish Kumar Srivastava, Steve Dai, Rajit Manohar, Zhiru Zhang
2017OLAF'17: Third International Workshop on Overlay Architectures for FPGAs.Hayden Kwok-Hay So, John Wawrzynek
2017FPGA Implementation of Non-Uniform DFT for Accelerating Wireless Channel Simulations (Abstract Only).Srinivas Siripurapu, Aman Gayasen, Padmini Gopalakrishnan, Nitin Chandrachoodan
2017Corolla: GPU-Accelerated FPGA Routing Based on Subgraph Dynamic Expansion.Minghua Shen, Guojie Luo
2017Storage-Efficient Batching for Minimizing Bandwidth of Fully-Connected Neural Network Layers (Abstract Only).Yongming Shen, Michael Ferdman, Peter A. Milder
2017Precise Coincidence Detection on FPGAs: Three Case Studies (Abstract Only).Ralf Salomon, Ralf Joost
2017Packet Matching on FPGAs Using HMC Memory: Towards One Million Rules.Daniel Rozhko, Geoffrey Elliott, Daniel Ly-Ma, Paul Chow, Hans-Arno Jacobsen
2017Synchronization Constraints for Interconnect Synthesis.Alex Rodionov, Jonathan Rose
2017Hardware Synthesis of Weakly Consistent C Concurrency.Nadesh Ramanathan, Shane T. Fleming, John Wickerson, George A. Constantinides
2017FPGA-based Hardware Accelerator for Image Reconstruction in Magnetic Resonance Imaging (Abstract Only).Emanuele Pezzotti, Alex Iacobucci, Gregory Nash, Umer I. Cheema, Paolo Vinella, Rashid Ansari
2017Can FPGAs Beat GPUs in Accelerating Next-Generation Deep Neural Networks?Eriko Nurvitadhi, Ganesh Venkatesh, Jaewoong Sim, Debbie Marr, Randy Huang, Jason Ong Gee Hock, Yeong Tat Liew, Krishnan Srivatsan, Duncan J. M. Moss, Suchit Subhaschandra, Guy Boudoukh
2017A Batch Normalization Free Binarized Convolutional Deep Neural Network on an FPGA (Abstract Only).Hiroki Nakahara, Haruyoshi Yonekawa, Hisashi Iwamoto, Masato Motomura
2017FPGA-Accelerated Transactional Execution of Graph Workloads.Xiaoyu Ma, Dan Zhang, Derek Chiou
526550 of 1,710← PreviousNext →

Comparable venues

Other A*/A conferences filed under the same field of research.