| 2010 | Voter insertion algorithms for FPGA designs using triple modular redundancy. | Jonathan M. Johnson, Michael J. Wirthlin |
| 2010 | Reconfigurable custom floating-point instructions (abstract only). | Zhanpeng Jin, Richard Neil Pittman, Alessandro Forin |
| 2010 | Odin II: an open-source verilog HDL synthesis tool for FPGA cad flows (abstract only). | Peter A. Jamieson, Kenneth B. Kent |
| 2010 | Design space exploration of throughput-optimized arrays from recurrence abstractions (abstract only). | Arpith C. Jacob, Jeremy D. Buhler, Roger D. Chamberlain |
| 2010 | Server-side coprocessor updating for mobile devices with FPGAs. | Chen Huang, Frank Vahid |
| 2010 | FPGA prototyping of an amba-based windows-compatible SoC. | Kan Huang, Junlin Lu, Jiufeng Pang, Yansong Zheng, Hao Li, Dong Tong, Xu Cheng |
| 2010 | Multiplier architectures for FPGA double precision functions (abstract only). | Y. Hamid, Martin Langhammer |
| 2010 | Acceleration of an analytical approach to collateralized debt obligation pricing. | Dharmendra P. Gupta, Paul Chow |
| 2010 | A semi-automatic toolchain for reconfigurable multiprocessor systems-on-chip: architecture development and application partitioning (abstract only). | Diana Ghringer, Michael Hbner, Michael Benz, Jrgen Becker |
| 2010 | Aggressive overclocking support using a novel timing error recovery technique on FPGAs (abstract only). | Amir Masoud Gharehbaghi, Bijan Alizadeh, Masahiro Fujita |
| 2010 | Energy efficient sensor node implementations. | Jan R. Frigo, Eric Y. Raby, Sean M. Brennan, Christophe Wolinski, Charles Wagner, Franois Charot, Edward Rosten, Vinod Kulathumani |
| 2010 | Maximizing area-constrained partial fault tolerance in reconfigurable logic. | David L. Foster, Darrin M. Hanna |
| 2010 | Automatic tool flow for shift-register-LUT reconfiguration: making run-time reconfiguration fast and easy (abstract only). | Brahim Al Farisi, Karel Bruneel, Harald Devos, Dirk Stroobandt |
| 2010 | An architecture for graphics processing in an FPGA (abstract only). | Marcus Dutton, David C. Keezer |
| 2010 | FPGA-based prototyping of a 2D MESH / TORUS on-chip interconnect (abstract only). | Donglai Dai, Aniruddha S. Vaidya, Roy Saharoy, Seungjoon Park, Dongkook Park, Hariharan L. Thantry, Ralf Plate, Elmar Maas, Akhilesh Kumar, Mani Azimi |
| 2010 | A 1 cycle-per-byte XML parsing accelerator. | Zefu Dai, Nick Ni, Jianwen Zhu |
| 2010 | Towards 5ps resolution TDC on a dynamically reconfigurable FPGA (abstract only). | Marc-Andr Daigneault, Jean-Pierre David |
| 2010 | LUT-based FPGA technology mapping for reliability (abstract only). | Jason Cong, Kirill Minkovich |
| 2010 | Accelerating Monte Carlo based SSTA using FPGA. | Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, Kirill Minkovich, Bo Yuan, Yi Zou |
| 2010 | A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs. | Doris Chen, Deshanand P. Singh, Jeffrey Chromczak, David M. Lewis, Ryan Fung, David Neto, Vaughn Betz |
| 2010 | Efficient FPGAs using nanoelectromechanical relays. | Chen Chen, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra |
| 2010 | Combining multicore and reconfigurable instruction set extensions. | Zhimin Chen, Richard Neil Pittman, Alessandro Forin |
| 2010 | A dependency graph based methodology for parallelizing HLL applications on FPGA (abstract only). | Sunita Chandrasekaran, Shilpa Shanbagh, Douglas L. Maskell |
| 2010 | Design and evaluation of a parameterizable NoC router for FPGAs (abstract only). | Mike Brugge, Mohammed A. S. Khalid |
| 2010 | Towards scalable placement for FPGAs. | Huimin Bian, Andrew C. Ling, Alexander Choong, Jianwen Zhu |