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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2001A System on Chip for Power Line Communications According to European Home Systems Specifications.Isidoro Urriza, Jos I. Garca-Nicols, Alfredo Sanz, Antonio Valdovinos
2001Dijkstra's Shortest Path Routing Algorithm in Reconfigurable Hardware.Matti Tommiska, Jorma Skytt
2001Virtex Implementation of Pipelined Adaptive LMS Predictor in Electronic Support Measures Receiver.Lok-Kee Ting, Roger F. Woods, Colin Cowan
2001Configuration Caching and Swapping.Suraj Sudhir, Suman Nath, Seth Copen Goldstein
2001A Data Re-use Based Compiler Optimization for FPGAs.Ram Subramanian, Santosh Pande
2001FPGA-Based Modelling Unit for High Speed Lossless Arithmetic Coding.Riad Stefo, Jos Luis Nez, Claudia Feregrino, Sudipta Mahapatra, Simon R. Jones
2001A Reconfigurable Approach to Packet Filtering.Raymond Sinnappan, Scott Hazelhurst
2001Rapid Construction of Partial Configuration Datastreams from High-Level Constructs Using JBits.Satnam Singh, Philip James-Roxby
2001Demonstrating Real-Time JPEG Image Compression-Decompression Using Standard Component IP Cores on a Programmable Logic Based Platform for DSP and Image Processing.Albert Simpson, Jill K. Hunter, Moira Wylie, Yi Hu, David Mann
2001Motivation from a Full-Rate Specific Design to a DSP Core Approach for GSM Vocoders.Shervin Sheidaei, Hamid Noori, Ahmad Akbari, Hossein Pedram
2001Evaluation of an FPGA Implementation of the Discrete Element Method.Benjamin Carrin Schfer, Steven F. Quigley, Andrew H. C. Chan
2001Prototyping Framework for Reconfigurable Processors.Sergej Sawitzki, Steffen Khler, Rainer G. Spallek
2001The Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems.Gilles Sassatelli, Lionel Torres, Jrme Galy, Gaston Cambon, Camille Diou
2001A Music Synthesizer on FPGA.Takashi Saito, Tsutomu Maruyama, Tsutomu Hoshino, Saburo Hirano
2001Generative Development System for FPGA Processors with Active Components.Stephan Rhl, Peter Dillinger, Stefan Hezel, Reinhard Mnner
2001Reconfigurable Breakpoints for Co-debug.Tim Price, Cameron Patterson
2001X-MatchPRO: A ProASIC-Based 200 Mbytes/s Full-Duplex Lossless Data Compressor.Jos Luis Nez, Claudia Feregrino, Simon R. Jones, Stephen Bateman
2001FPGA-Based Discrete Wavelet Transforms System.Mokhtar Nibouche, Ahmed Bouridane, Fionn Murtagh, Omar Nibouche
2001A Generic Library for Adaptive Computing Environments.Tilman Neumann, Andreas Koch
2001Parameterized Function Evaluation for FPGAs.Oskar Mencer, Nicolas Boullis, Wayne Luk, Henry Styles
2001Implementing a Hidden Markov Model Speech Recognition System in Programmable Logic.Stephen J. Melnikoff, Steven F. Quigley, Martin J. Russell
2001JBitsScott McMillan, Cameron Patterson
2001Single-Chip FPGA Implementation of the Advanced Encryption Standard Algorithm.Mire McLoone, John V. McCanny
2001An Approach to Real-Time Visualization of PIV Method with FPGA.Tsutomu Maruyama, Yoshiki Yamaguchi, Atsushi Kawase
2001Implementation of a NURBS to Bzier Conversor with Constant Latency.Paula N. Malln, Montserrat Bo, Javier D. Bruguera
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