Skip to content

Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2001FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits.Pierluigi Civera, Luca Macchiarulo, Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo Violante
2001An FPGA-Based Syntactic Parser for Real-Life Almost Unrestricted Context-Free Grammars.Cristian Ciressan, Eduardo Sanchez, Martin Rajman, Jean-Cdric Chappelier
2001The Evolution of Programmable Logic: Past, Present, and Future Predictions [Abstract].Bill Carter
2001Compilation Increasing the Scheduling Scope for Multi-memory-FPGA-Based Custom Computing Machines.Joo M. P. Cardoso, Horcio C. Neto
2001A n-Bit Reconfigurable Scalar Quantiser.Oswaldo Cadenas, Graham M. Megson
2001Static Profile-Driven Compilation for FPGAs.Srihari Cadambi, Seth Copen Goldstein
2001Chip-Based Reconfigurable Task Management.Gordon J. Brebner, Oliver Diessel
2001Reconfigurable Router Modules Using Network Protocol Wrappers.Florian Braun, John W. Lockwood, Marcel Waldvogel
2001CRISP: A Template for Reconfigurable Instruction Set Processors.Pieter Op de Beeck, Francisco Barat, Murali Jayapala, Rudy Lauwereins
2001Efficient Mapping of Pre-synthesized IP-Cores onto Dynamically Reconfigurable Array Architectures.Jrgen Becker, Nicolas Liebau, Thilo Pionteck, Manfred Glesner
2001Multiple Stereo Matching Using an Extended Architecture.Miguel Arias-Estrada, Juan M. Xicotncatl Prez
2001Accelerating Matrix Product on Reconfigurable Hardware for Signal Processing.Abbes Amira, Ahmed Bouridane, Peter Milligan
2001Implementation of (Normalised) RLS Lattice on Virtex.Felix Albu, Jiri Kadlec, Christopher I. Softley, Rudolf Matousek, Antonin Hermanek, Nick Coleman, Anthony D. Fagan
2001A New Placement Method for Direct Mapping into LUT-Based FPGAs.Joerg Abke, Erich Barke
2000Implementing Kak Neural Networks on a Reconfigurable Computing Platform.Jihan Zhu, George J. Milne
2000A Combined Approach to High-Level Synthesis for Dynamically Reconfigurable Systems.Xue-Jie Zhang, Kam-Wing Ng, Wayne Luk
2000A Reconfigurable Stochastic Model Simulator for Analysis of Parallel Systems.Ou Yamamoto, Yuichiro Shibata, Hitoshi Kurosawa, Hideharu Amano
2000A Co-processor System with a Virtex FPGA for Evolutionary Computation.Yoshiki Yamaguchi, Akira Miyashita, Tsutomu Maruyama, Tsutomu Hoshino
2000A New Floorplanning Method for FPGA Architectural Research.Frank Wolz, Reiner Kolla
2000Efficient Self-Reconfigurable Implementations Using On-chip Memory.Sameer Wadhwa, Andreas Dandalis
2000Automatic Temporal Floorplanning with Guaranteed Solution Feasibility.Milan Vasilko, Graham Benyon-Tinker
2000Design Visualisation for Dynamically Reconfigurable Systems.Milan Vasilko
2000Educational Programmable Hardware Prototyping and Verification System.Andrej Trost, Andrej Zemva, Baldomir Zajc
2000A Multi-node Dynamic Reconfigurable Computing System with Distributed Reconfiguration Controller.Abdellah Touhafi
2000Possibilities and Limitations of Applying Evolvable Hardware to Real-World Applications.Jim Trresen
2,7762,800 of 3,233← PreviousNext →

Comparable venues

Other A*/A conferences filed under the same field of research.