| 2014 | Method for dynamic power monitoring on FPGAs. | Mohamad Najem, Pascal Benoit, Florent Bruguier, Gilles Sassatelli, Lionel Torres |
| 2014 | New approaches for in-system debug of behaviorally-synthesized FPGA circuits. | Joshua S. Monson, Brad L. Hutchings |
| 2014 | Pipelined reconfigurable multiplication with constants on FPGAs. | Konrad Mller, Martin Kumm, Marco Kleinlein, Peter Zipf |
| 2014 | Using an OpenCL framework to evaluate interconnect implementations on FPGAs. | Vincent Mirian, Paul Chow |
| 2014 | Hardware accelerated novel optical de novo assembly for large-scale genomes. | Pingfan Meng, Matthew Jacobsen, Motoki Kimura, Vladimir Dergachev, Thomas Anantharaman, Michael Requa, Ryan Kastner |
| 2014 | Scalable parallel architecture for singular value decomposition of large matrices. | Unai Martinez-Corral, Koldo Basterretxea, Raul Finker |
| 2014 | An enhanced and embedded GNU radio flow. | Ryan Marlow, Chris Dobson, Peter Athanas |
| 2014 | Interconnect for commodity FPGA clusters: Standardized or customized? | A. Theodore Markettos, Paul James Fox, Simon W. Moore, Andrew W. Moore |
| 2014 | Application specific multi-port memory customization in FPGAs. | Gorker Alp Malazgirt, Hasan Erdem Yantir, Arda Yurdakul, Smal Niar |
| 2014 | Asynchronously assisted FPGA for variability. | Hock Soon Low, Delong Shang, Fei Xia, Alexandre Yakovlev |
| 2014 | Accelerate NDN name lookup using FPGA: Challenges and a scalable approach. | Yanbiao Li, Dafang Zhang, Xian Yu, Wei Liang, Jing Long, Hong Qiao |
| 2014 | FPGA implementation of an interior point method for high-speed model predictive control. | Junyi Liu, Helfried Peyrl, Andreas Burg, George A. Constantinides |
| 2014 | Simplification and hardware implementation of the feature descriptor vector calculation in the SIFT algorithm. | Pablo Leyva, Gins Domnech-Asensi, F. Javier Garrigs, Julio Illade-Quinteiro, Vctor M. Brea, Paula Lpez, Diego Cabello |
| 2014 | High throughput channel tracking for JTRS wireless channel emulation. | Dajung Lee, Janarbek Matai, Brad T. Weals, Ryan Kastner |
| 2014 | An FPGA-optimized architecture of horn and schunck optical flow algorithm for real-time applications. | Michael Kunz, Alexander Ostrowski, Peter Zipf |
| 2014 | Pipelined compressor tree optimization using integer linear programming. | Martin Kumm, Peter Zipf |
| 2014 | Hierarchical reconfiguration of FPGAs. | Dirk Koch, Christian Beckhoff |
| 2014 | Educating hardware design - From primary school children to postgraduate engineers. | Oliver Knodel, Martin Zabel, Patrick Lehmann, Rainer G. Spallek |
| 2014 | Trade-offs and progressive adoption of FPGA acceleration in network traffic monitoring. | Lukas Kekely, Viktor Pus, Pavel Bencek, Jan Korenek |
| 2014 | A high speed design and implementation of dynamically reconfigurable processor using 28NM SOI technology. | Toru Katagiri, Hideharu Amano |
| 2014 | Secure partial dynamic reconfiguration with unsecured external memory. | Hirak J. Kashyap, Ricardo Chaves |
| 2014 | FPGA acceleration of SAT/Max-SAT solving using variable-way cache. | Kenji Kanazawa, Tsutomu Maruyama |
| 2014 | Multi-FPGA reconfigurable system for accelerating MATLAB simulations. | Muhammed Al Kadi, Max Ferger, Volker Stegemann, Michael Hbner |
| 2014 | Efficient implementation of a single-precision floating-point arithmetic unit on FPGA. | Wilson Jos, Ana Rita Silva, Horcio C. Neto, Mrio P. Vstias |
| 2014 | Comparing soft and hard vector processing in FPGA-based embedded systems. | Soh Jun Jie, Nachiket Kapre |