| 2024 | Better Together: Combining Analytical and Annealing Methods for FPGA Placement. | Rachel Selina Rajarathnam, Kate Thurmer, Vaughn Betz, Mahesh A. Iyer, David Z. Pan |
| 2024 | StencilStream: A SYCL-based Stencil Simulation Framework Targeting FPGAs. | Jan-Oliver Opdenhvel, Christoph Alt, Christian Plessl, Tobias Kenter |
| 2024 | An Open-Source And Extensible Framework for Fast Prototyping and Benchmarking of Spiking Neural Network Hardware. | Shadi Matinizadeh, Anup Das |
| 2024 | A High-Performance Routing Engine for Large-Scale FPGAs. | Timothy Martin, Dani Maarouf, Gary Grwal, Shawki Areibi |
| 2024 | CFEACT: A CGRA-based Framework Enabling Agile CNN and Transformer Accelerator Design. | Yiqing Mao, Xuchen Gao, Jiahang Lou, Yunhui Qiu, Wenbo Yin, Wai-Shing Luk, Lingli Wang |
| 2024 | Leveraging HBM2 for Accelerating k-mer Counting with oneAPI on FPGAs. | Owen P. Lucas, Alan D. George |
| 2024 | PolyLUT-Add: FPGA-based LUT Inference with Wide Inputs. | Binglei Lou, Richard Rademacher, David Boland, Philip H. W. Leong |
| 2024 | BitBlender: Scalable Bloom Filter Acceleration on FPGAs with Dynamic Scheduling. | Kenneth Liu, Alec Lu, Zhenman Fang |
| 2024 | Fast Switching Activity Estimation for HLS-Produced Dataflow Circuits. | Jiantao Liu, Maksymilian Graczyk, Andrea Guerrieri, Lana Josipovic |
| 2024 | Revealing Untapped DSP Optimization Potentials for FPGA-Based Systolic Matrix Engines. | Jindong Li, Tenglong Li, Guobin Shen, Dongcheng Zhao, Qian Zhang, Yi Zeng |
| 2024 | CFSA: An Efficient CPU-FPGA Synergies Accelerator for Neural Radiation Field Rendering. | Shangrong Li, Kai Liu, Wei Liu, Zibo Guo |
| 2024 | Efficient Design Space Exploration for Dynamic & Speculative High-Level Synthesis. | Dylan Leothaud, Jean-Michel Gorius, Simon Rokicki, Steven Derrien |
| 2024 | IMAGine: An In-Memory Accelerated GEMV Engine Overlay. | M. D. Arafat Kabir, Tendayi Kamucheka, Nathaniel Fredricks, Joel Mandebi, Jason D. Bakos, Miaoqing Huang, David Andrews |
| 2024 | JSON-CooP: A JSON Decompression/Parsing Co-Design for FPGAs. | Tobias Hahn, Stefan Wildermann, Jrgen Teich |
| 2024 | DynaRapid: Fast-Tracking from C to Routed Circuits. | Andrea Guerrieri, Srijeet Guha, Chris Lavin, Eddie Hung, Lana Josipovic, Paolo Ienne |
| 2024 | FPGA Modular Multipliers using Hybrid Reduction Techniques. | Sergey Gribok, Martin Langhammer, Bogdan Pasca |
| 2024 | Chimera: A co-simulation framework combining with gem5 and FPGA platform for efficient verification. | Chao Fu, Zengshi Wang, Jun Han |
| 2024 | H2PIPE: High Throughput CNN Inference on FPGAs with High-Bandwidth Memory. | Mario Doumet, Marius Stan, Mathew Hall, Vaughn Betz |
| 2024 | AMA: An Analytical Approach to Maximizing the Efficiency of Deep Learning on Versal AI Engine. | Xiaodong Deng, Shijie Wang, Tianyi Gao, Jing Liu, Longjun Liu, Nanning Zheng |
| 2024 | Kratos: An FPGA Benchmark for Unrolled DNNs with Fine-Grained Sparsity and Mixed Precision. | Xilai Dai, Yuzong Chen, Mohamed S. Abdelfattah |
| 2024 | Techniques for Exploring Fine-Grained LUT and Routing Aging on a 28nm FPGA. | Hayden Cook, Jeffrey Goeders |
| 2024 | SoGraph: A State-Aware Architecture for Out-of-Memory Graph Processing on HBM-Equipped FPGAs. | Qianyu Cheng, Zhendong Zheng, Tianhao Jiang, Cheng Tang, Teng Wang, Lei Gong, Chao Wang, Xuehai Zhou |
| 2024 | A Better Kyber Butterfly for FPGAs. | Jonas Bertels, Quinten Norga, Ingrid Verbauwhede |
| 2024 | NeuraLUT: Hiding Neural Network Density in Boolean Synthesizable Functions. | Marta Andronic, George A. Constantinides |
| 2024 | Fast and Practical Strassen's Matrix Multiplication using FPGAs. | Afzal Ahmad, Linfeng Du, Wei Zhang |