Field Programmable Logic and Applications

FPL

CORE rank

CORE rank (raw)

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Best Computer Systems Engineering conferences

Papers per year

1994182 peak2025

Most published authors

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

Year	Title	Authors
2014	An empirical evaluation of High-Level Synthesis languages and tools for database acceleration.	Oriol Arcas-Abella, Geoffrey Ndu, Nehir Snmez, Mohsen Ghasempour, Adri Armejach, Javier Navaridas, Wei Song, John Mawer, Adrin Cristal, Mikel Lujn
2014	Balancing WDDL dual-rail logic in a tree-based FPGA to enhance physical security.	Emna Amouri, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger, Habib Mehrez
2014	Aging effects in FPGAs: an experimental analysis.	Abdulazim Amouri, Florent Bruguier, Saman Kiamehr, Pascal Benoit, Lionel Torres, Mehdi Baradaran Tahoori
2014	An FPGA sliding window-based architecture harris corner detector.	Alexandru Amaricai, Constantina-Elena Gavriliu, Oana Boncalo
2014	High-level synthesis-based design methodology for Dynamic Power-Gated FPGAs.	Rehan Ahmed, Assem A. M. Bsoul, Steven J. E. Wilton, Peter Hallschmid, Richard Klukas
2014	Towards dark silicon era in FPGAs using complementary hard logic design.	Ali Ahari, Behnam Khaleghi, Zahra Ebrahimi, Hossein Asadi, Mehdi Baradaran Tahoori
2014	High-throughput implementation of a million-point sparse Fourier Transform.	Abhinav Agarwal, Haitham Hassanieh, Omid Abari, Ezzeldin Hamed, Dina Katabi, Arvind
2013	A novel net-partition-based multithread FPGA routing method.	Chun Zhu, Jian Wang, Jinmei Lai
2013	High-level synthesis with behavioral level multi-cycle path analysis.	Hongbin Zheng, Swathi T. Gurumani, Liwei Yang, Deming Chen, Kyle Rupnow
2013	An automatic FPGA design and implementation framework.	Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi
2013	FPGA IP protection by binding Finite State Machine to Physical Unclonable Function.	Jiliang Zhang, Yaping Lin, Yongqiang Lyu, Gang Qu, Ray C. C. Cheung, Wenjie Che, Qiang Zhou, Jinian Bian
2013	High performance FPGA object detector: Hardware prototype.	Pavel Zemck, Roman Jurnek, Petr Musil, Martin Musil, Michal Hradis
2013	High performance architecture for object detection in streamed videos.	Pavel Zemck, Roman Jurnek, Petr Musil, Martin Musil, Michal Hradis
2013	FPGA based hardware-software co-designed dynamic binary translation system.	Yuan Yao, Zhongyong Lu, Qingsong Shi, Wenzhi Chen
2013	Optimizing under abstraction: Using prefetching to improve FPGA performance.	Hsin-Jung Yang, Kermin Fleming, Michael Adler, Joel S. Emer
2013	Binarization based implementation for real-time human detection.	Shuai Xie, Yibin Li, Zhiping Jia, Lei Ju
2013	Towards a many-core architecture for HPC.	Janet Wyngaard, Michael Inggs, John Collins, Brian Farrimond
2013	Low-cost, high-performance branch predictors for soft processors.	Di Wu, Kaveh Aasaraai, Andreas Moshovos
2013	Hybrid FPGA-accelerated SQL query processing.	Louis Woods, Zsolt Istvn, Gustavo Alonso
2013	A 64-bit MIPS processor running freebsd on a portable FPGA tablet.	Jonathan Woodruff, A. Theodore Markettos, Simon W. Moore
2013	Generation of multi-core systems from multithreaded software.	Alexander Wold, Jim Trresen, Andreas Agne
2013	FPGA-based K-means clustering using tree-based data structures.	Felix Winterstein, Samuel Bayliss, George A. Constantinides
2013	SimXMD: Simulation-based HW/SW co-debugging.	Ruediger Willenberg, Paul Chow
2013	Simulation-based HW/SW co-debugging for field-programmable systems-on-chip.	Ruediger Willenberg, Paul Chow
2013	A space/time tradeoff methodology using higher-order functions.	Rinse Wester, Jan Kuper

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