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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2008A hardware compilation flow for instance-specific VLIW cores.Markus Koester, Wayne Luk, Geoffrey Brown
2008ReCoBus-Builder - A novel tool and technique to build statically and dynamically reconfigurable systems for FPGAS.Dirk Koch, Christian Beckhoff, Jrgen Teich
2008A variation-aware constant-order optimization scheme utilizing delay detectors to search for fastest paths on FPGAS.Kazutoshi Kobayashi, Yohei Kume, Cam Lai Ngo, Yuuri Sugihara, Hidetoshi Onodera
2008An embedded dynamically self-reconfigurable Master-Slaves MPSoC architecture.Kimon Karras, Elias S. Manolakos
2008FPGA acceleration of Monte-Carlo based credit derivative pricing.Alexander Kaganov, Paul Chow, Asif Lakhany
2008BOUNCE, a new approach to measure sub-nanosecond time intervals.Ralf Joost, Ralf Salomon
2008CVC: The C to RTL compiler for callback-based verification model.Yasuhiro Ito, Yutaka Sugawara, Mary Inaba, Kei Hiraki
2008An element-by-element preconditioned Conjugate Gradient solver of 3D tetrahedral finite elements on an FPGA coprocessor.Jing Hu, Steven F. Quigley, Andrew Chan
2008Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems.Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda
2008Rapid estimation of power consumption for hybrid FPGAs.Chun Hok Ho, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton
2008A new methodology for debugging and validation of soft cores.Christian Hochberger, Alexander Weiss
2008Application-specific reconfigurable processors.Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Gtz Kappen, Tobias G. Noll
2008Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks.Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dudek, Thomas Dowrick, Liam McDaid
2008High-performance fpga-based floating-point adder with three inputs.Andre Guntoro, Manfred Glesner
2008A lifting-based DWT and IDWT processor with multi-context configuration and normalization factor.Andre Guntoro, Manfred Glesner
2008Enhancing COPACOBANA for advanced applications in cryptography and cryptanalysis.Tim Gneysu, Christof Paar, Gerd Pfeiffer, Manfred Schimmler
2008Area optimization of cryptographic co-processors implemented in dual-rail with precharge positive logic.Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Philippe Hoogvorst
2008A non-volatile run-time FPGA using thermally assisted switching MRAMS.Yoann Guillemenet, Lionel Torres, Gilles Sassatelli, Nicolas Bruchon, Ilham Hassoune
2008New dimensions for multiprocessor architectures: Ondemand heterogeneity, infrastructure and performance through reconfigurability - the RAMPSoC approach.Diana Ghringer, Michael Hbner, Thomas Perschke, Jrgen Becker
2008Reconfigurable many-cores with lean interconnect.Heiner Giefers
2008Novel FPGA based Haar classifier face detection algorithm acceleration.Changjian Gao, Shih-Lien Lu
2008Memory access parallelisation in high-level language compilation for reconfigurable adaptive computers.Hagen Gdke, Florian Stock, Andreas Koch
2008Active kernel monitoring to combat scheduler gaming in reconfigurable computing systems.Wenyin Fu, Katherine Compton
2008NOC architecture design for multi-cluster chips.Henrique C. Freitas, Philippe Olivier Alexandre Navaux, Tatiana Gadelha Serra dos Santos
2008Enhancing security of ring oscillator-based trng implemented in FPGA.Viktor Fischer, Florent Bernard, Nathalie Bochard, Michal Varchola
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