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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2007Soft IP core implementation of recursive least squares filter using only multplicative and additive operators.Gaye Lightbody, Roger F. Woods, Jonathan Francey
2007Fast and Accurate Interval-Based Timing Estimator for Variability-Aware FPGA Physical Synthesis Tools.Chee Sing Lee, Wei Ting Loke, Wenjuan Zhang, Yajun Ha
2007Compact AES-based Architecture for Symmetric Encryption, Hash Function, and Random Number Generation.Ralf Laue, Oliver Kelm, Sebastian Schipp, Abdulhadi Shoufan, Sorin A. Huss
2007An Execution Model for Hardware/Software Compilation and its System-Level Realization.Holger Lange, Andreas Koch
2007Clock-Aware Placement for FPGAs.Julien Lamoureux, Steven J. E. Wilton
2007Improving Pipelined Soft Processors with Multithreading.Martin Labrecque, J. Gregory Steffan
2007Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA.Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesman, Henk Corporaal
2007RAMP Blue: A Message-Passing Manycore System in FPGAs.Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg Gibeling, Pierre-Yves Droz
2007FlowContext: Flexible Platform for Multigigabit Stateful Packet Processing.Martin Kosek, Jan Korenek
2007Accelerating a Medical 3D Brain MRI Analysis Algorithm using a High-Performance Reconfigurable Computer.Jahyun J. Koo, Alan C. Evans, Warren J. Gross
2007Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices.Shannon Koh, Oliver Diessel
2007TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms.Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun
2007Implementation of Low Frequency Finite State Machines Using the VIRTEX SRL16 Primitive.Irwin O. Kennedy
2007An FPGA Solver for Very Large SAT Problems.Kenji Kanazawa, Tsutomu Maruyama
2007A High Speed License Plate Recognition System on an FPGA.Takamasa Kanamori, Hideharu Amano, Masatoshi Arai, Daisuke Konno, Tomomichi Nanba, Yoshiaki Ajioka
2007Accelerating Microblaze Floating Point Operations.Jiri Kadlec, Roman Bartosinski, Martin Danek
2007CuNoC: A Scalable Dynamic NoC for Dynamically Reconfigurable FPGAs.Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber
2007Adaptive Thermoregulation for Applications on Reconfigurable Devices.Phillip H. Jones, James Moscola, Young H. Cho, John W. Lockwood
2007Accelerating tool path computing in CAD/CAM: A FPGA architecture for turning lathe machining..Antonio Jimeno-Morenilla, Antonio Martnez-lvarez, Sergio A. Cuenca, Jos-Luis Snchez-Romero
2007FPGA Implementation of 64-bit Exponential Function for HPC.Ernest Jamro, Kazimierz Wiatr, Maciej Wielgosz
2007A Unified Streaming Architecture for Real Time Face Detection and Gender Classification.Kevin M. Irick, Michael DeBole, Vijaykrishnan Narayanan, Rajeev Sharma, Hankyu Moon, Satish Mummareddy
2007Exploiting Hardware and Software Low Power Techniques for Energy Efficient Co-scheduling in Dynamically Reconfigurable Systems.Pao-Ann Hsiung, Chih-Wen Liu
2007Domain-Specific Hybrid FPGA: Architecture and Floating Point Applications.Chun Hok Ho, Chi Wai Yu, Philip Heng Wai Leong, Wayne Luk, Steven J. E. Wilton
2007The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems.Andreas Herrholz, Frank Oppenheimer, Philipp A. Hartmann, Andreas Schallenberg, Wolfgang Nebel, Christoph Grimm, Markus Damm, Jan Haase, Florian Brame, Fernando Herrera, Eugenio Villar, Ingo Sander, Axel Jantsch, Anne-Marie Fouilliart, Marcos Martnez
2007A resource optimized SoC Kit for FPGAs.Gerald Hempel, Christian Hochberger
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