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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2006Variable-Length Hashing for Exact Pattern Matching.Dionisios N. Pnevmatikatos, Aggelos Arelakis
2006Applying Partial Reconfiguration to Networks-On-Chips.Thilo Pionteck, Roman Koch, Carsten Albrecht
2006A Flexible Implementation of a Temporal Filter with Motion Compensation.Thomas Perschke
2006FPGA Implementation of an Efficient Correlator for Complementary Sets of Sequences.Mara del Carmen Prez, Jess Urea, lvaro Hernndez, Carlos De Marziani, Alberto Ochoa, William P. Marnane
2006Compiling Higher-Order Polymorphic Hardware Descriptions Into Parametrised VHDL Libraries with Flexible Placement Information.Oliver Pell, Wayne Luk
2006Hthreads: A Computational Model for Reconfigurable Devices.Wesley Peck, Erik K. Anderson, Jason Agron, Jim Stevens, Fabrice Baijot, David Andrews
2006A Biologically Inspired FPGA Based Implementation of a Tactile Sensory System for Object Recognition and Texture Discrimination.Martin J. Pearson, Mokhtar Nibouche, Anthony G. Pipe, Chris Melhuish, Ian Gilhespy, Benjamin Mitchinson, Kevin N. Gurney, Tony J. Prescott, Peter Redgrave
2006FPGA Implementation of 3-D Thermal Model Simulator.Fernando Pardo, Paula Lpez, Diego Cabello, Marco Balsi
2006Performance Evaluation of a Preloading Model in Dynamically Reconfigurable Processors.Kyprianos Papademetriou, Apostolos Dollas
2006A Dynamic Reconfigurable Fabric for Platform SoCs.Christos A. Papachristou, J. Weaver, R. Vijayakumar, Francis G. Wolff
2006Energy Efficient Statistical On-Chip Communication Bus Synthesis for a Reconfigurable Architecture.Sujan Pandey, Manfred Glesner
2006Academia to IPO - A Modern Odyssey.Ian Page
2006Performance Evaluation of an Fpga-Based Biochemical Simulator ReCSip.Yasunori Osana, Masato Yoshimi, Akira Funahashi, Noriko Hiroi, Yuichiro Shibata, Naoki Iwanaga, Hiroaki Kitano, Hideharu Amano
2006Evaluation and Design of Processor-Like Reconfigurable Architectures.Tobias Oppold
2006FPGA-Based Boundary-Scan Bist.ngel Quirs-Olozbal, Ma de los ngeles Cifredo Chacn, Diego Gomez Vela
2006Execution Objects for Dynamically Reconfigurable FPGA Systems.Timothy F. Oliver, Douglas L. Maskell
2006Fast Full-Search Block Matching Algorithm Motion Estimation Alternatives in FPGA.Joaqun Olivares, Ignacio Benavides, Javier Hormigo, Julio Villalba, Emilio L. Zapata
2006General Digit Width Normal Basis Multipliers with Circular and Linear Structure.Martin Novotn, Jan Schmidt
2006Real-Time Video Pixel Matching.Jean-Baptiste Note, Mark Shand, Jean Vuillemin
2006A Reconfigurable Functional Unit for an Adaptive Dynamic Extensible Processor.Hamid Noori, Farhad Mehdipour, Kazuaki J. Murakami, Koji Inoue, Morteza Saheb Zamani
2006Efficient Automated Synthesis, Programing, and Implementation of Multi-Processor Platforms on FPGA Chips.Hristo Nikolov, Todor P. Stefanov, Ed F. Deprettere
2006An Alternative to Sequential Architectures to Improve the Processing Time of Passive Stereovision Algorithms.Abdelelah Naoulou, Jean-Louis Boizard, Jean-Yves Fourniols, Michel Devy
2006Fault Tolerant Reconfigurable Device Based on Autonomous-Repair Cells.Kentaro Nakahara, Shin'ichi Kouyama, Tomonori Izumi, Hiroyuki Ochi, Yukihiro Nakamura
2006An FPGA-Based System on Chip for the Measurement of QCM Sensors Resolution.Mara Jos Moure, Mara Dolores Valds, Pablo Rodiz, Loreto Rodrguez-Pardo, Jos Faria Rodrguez
2006Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices.James Moscola, Young H. Cho, John W. Lockwood
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