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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2004Real-Time Visual Motion Detection of Overtaking Cars for Driving Assistance Using FPGAs.Sonia Mota, Eduardo Ros, Javier Daz, Eva M. Ortigosa, Rodrigo Ags, Richard R. Carrillo
2004FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications.Leandro Mller, Ney Laert Vilar Calazans, Fernando Gehm Moraes, Eduardo Wenzel Brio, Ewerson Carvalho, Daniel Camozzato
2004A Framework for Energy Efficient Design of Multi-rate Applications Using Hybrid Reconfigurable Systems.Sumit Mohanty, Viktor K. Prasanna
2004Scalable Defect Tolerance Beyond the SIA Roadmap.Mahim Mishra
2004Area*Time Optimized Hogenauer Channelizer Design Using FPL Devices.Uwe Meyer-Bse, Suhasini Rao, Javier Ramrez, Antonio Garca
2004Real-Time Computation of the Generalized Hough Transform.Tsutomu Maruyama
2004Design and Implementation of the Memory Scheduler for the PC-Based Router.Toms Marek, Martin Novotn, Ludek Crha
2004FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-T.Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber
2004MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Blocks.R. Manimegalai, A. Manoj Kumar, B. Jayaram, V. Kamakoti
2004Minimising Reconfiguration Overheads in Embedded Applications (Abstract).Usama Malik
2004On Computing Maximum Likelihood Phylogeny Using FPGA p.Terrence S. T. Mak, Kai-Pui Lam
2004FPGA-Based Computation for Maximum Likelihood Phylogenetic Tree Evaluation.Terrence S. T. Mak, Kai-Pui Lam
2004IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter.Ralf Ludewig, Oliver Soffke, Peter Zipf, Manfred Glesner, Kong-Pang Pun, Kuen Hung Tsoi, Kin-Hong Lee, Philip Heng Wai Leong
2004Power Consumption Reduction Through Dynamic Reconfiguration.Michael G. Lorenz, Luis Mengibar, Mario Garca-Valderas, Luis Entrena
2004FPGA Implementation of Biometric Authentication System Based on Hand Geometry.Celia Lpez-Ongil, Raul Snchez-Reillo, Judith Liu-Jimenez, Fernando Casado, Leslie Snchez, Luis Entrena
2004Compact Buffered Routing Architecture.Andrea Lodi, Roberto Giansante, Carlo Chiesa, Luca Ciccarelli, Fabio Campi, Mario Toma
2004Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs.Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne Luk
2004High Throughput Serpent Encryption Implementation.Jess Lzaro, Armando Astarloa, Jagoba Arias, Unai Bidarte, Carlos Cuadrado
2004A Reconfigurable Recurrent Bitonic Sorting Network for Concurrently Accessible Data.Christophe Layer, Hans-Jrg Pfleiderer
2004The Partition into Hypercontexts Problem for Hyperreconfigurable Architectures.Sebastian Lange, Martin Middendorf
2004HW/SW Co-design by Automatic Embedding of Complex IP Cores.Holger Lange, Andreas Koch
2004Reconfigurable Instruction Set Extension for Enabling ECC on an 8-Bit Processor.Sandeep S. Kumar, Christof Paar
2004Application Specific Small-Scale Reconfigurability.Vinu Vijay Kumar
2004Optimization of Testability of Sequential Circuits Implemented in FPGAs with Embedded Memory.Andrzej Krasniewski
2004Increasing ILP of RISC Microprocessors Through Control-Flow Based Reconfiguration.Steffen Khler, Jens Braunes, Thomas Preuer, Martin Zabel, Rainer G. Spallek
2,3262,350 of 3,233← PreviousNext →

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