| 2004 | Automated Speculation and Parallelism in High Performance Network Applications. | Graham Schelle, Dirk Grunwald |
| 2004 | FPGA Implementation of a Tool Breakage Detection Algorithm in CNC Milling Machines. | Ren de Jess Romero-Troncoso, Gilberto Herrera Ruiz |
| 2004 | FPGAs and the Era of Field Programmability. | Wim Roelandts |
| 2004 | Virtualizing the Dimensions of a Coarse-Grained Reconfigurable Array. | Tapio Ristimki, Jari Nurmi |
| 2004 | SoftSONIC: A Customisable Modular Platform for Video Applications. | Tero Rissa, Peter Y. K. Cheung, Wayne Luk |
| 2004 | A Specific Scheduling Flow for Dynamically Reconfigurable Hardware. | Javier Resano |
| 2004 | System-Level Modeling of Dynamically Reconfigurable Co-processors. | Yang Qu, Kari Tiensyrj, Kostas Masselos |
| 2004 | A Universal and Efficient AES Co-processor for Field Programmable Logic Arrays. | Norbert Pramstaller, Johannes Wolkerstorfer |
| 2004 | JHDLBits: The Merging of Two Worlds. | Alexandra Poetter, Jesse Hunter, Cameron D. Patterson, Peter M. Athanas, Brent E. Nelson, Neil Steiner |
| 2004 | A Dynamically Reconfigurable Function-Unit for Error Detection and Correction in Mobile Terminals. | Thilo Pionteck, Thomas Stiefmeier, Thorsten Staake, Manfred Glesner |
| 2004 | Implementing High-Speed Double-Data Rate (DDR) SDRAM Controllers on FPGA. | Eduardo Picatoste-Olloqui, Francisco Cardells-Tormo, Jordi Sempere-Agull, Atil Herms-Berenguer |
| 2004 | Automating the Layout of Reconfigurable Subsystems via Template Reduction. | Shawn Phillips, Akshay Sharma, Scott Hauck |
| 2004 | A Multiplexer-Based Concept for Reconfigurable Multiplier Arrays. | Oliver A. Pfnder, Roland Hacker, Hans-Jrg Pfleiderer |
| 2004 | The XPP Architecture and Its Co-simulation Within the Simulink Environment. | Mihail Petrov, Tudor Murgan, Frank May, Martin Vorbach, Peter Zipf, Manfred Glesner |
| 2004 | FPGA Custom DSP for ECG Signal Analysis and Compression. | Marcos Martnez Peir, Francisco Jos Ballester-Merelo, Guillermo Pay Vay, Ricardo Jos Colom-Palero, Rafael Gadea Girons, Jos Belenguer |
| 2004 | Intellectual Property Protection for RNS Circuits on FPGAs. | Luis Parrilla, Encarnacin Castillo, Antonio Garca, Antonio Lloris-Ruz |
| 2004 | FPGAs BIST Evaluation. | Abilio Parreira, Joo Paulo Teixeira, Marcelino B. Santos |
| 2004 | The PowerPC Backend Molen Compiler. | Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis |
| 2004 | A Parallel FFT Architecture for FPGAs. | Joseph M. Palmer, Brent E. Nelson |
| 2004 | A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms. | Jingzhao Ou, Viktor K. Prasanna |
| 2004 | Minimum Sum of Absolute Differences Implementation in a Single FPGA Device. | Joaqun Olivares, Javier Hormigo, Julio Villalba, Ignacio Benavides |
| 2004 | Real-Time Detection of Moving Objects. | Hiroaki Niitsuma, Tsutomu Maruyama |
| 2004 | AAA and SynDEx-Ic: A Methodology and a Software Framework for the Implementation of Real-Time Applications onto Reconfigurable Circuits. | Pierre Niang, Thierry Grandpierre, Mohamed Akil, Yves Sorel |
| 2004 | Flow Monitoring in High-Speed Networks with 2D Hash Tables. | David Nguyen, Joseph Zambreno, Gokhan Memik |
| 2004 | Power-Driven Design Partitioning. | Rajarshi Mukherjee, Seda Ogrenci Memik |