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Field Programmable Logic and Applications

FPL

B

CORE rank

CORE rank (raw)

B

Fields of research

Computer Systems Engineering

Papers indexed

3,233

1994–2025

Papers per year

1994182 peak2025

FPL papers

3,233 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2004The Implementation of a FPGA Hardware Debugger System with Minimal System Overhead.Jonathan Noel Tombs, Miguel Angel Aguirre Echnove, Fernando Muoz, Vicente Baena Lecuyer, Antonio Jess Torralba Silgado, A. Fernandez-Len, Francisco Tortosa
2004Methods and Tools for High-Resolution Imaging.Tim Todman, Wayne Luk
2004Secure Logic Synthesis.Kris Tiri, Ingrid Verbauwhede
2004Implementing Graphics Shaders Using FPGAs.David B. Thomas, Wayne Luk
2004Dynamic Adaptive Runtime Routing Techniques in Multigrain Reconfigurable Hardware Architectures.Alexander Thomas, Jrgen Becker
2004Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor.Carlos J. Tavares, C. Bungardean, G. M. Matos, Jos T. de Sousa
2004An FPGA Based Coprocessor for the Classification of Tissue Patterns in Prostatic Cancer.Muhammad Atif Tahir, Ahmed Bouridane, Fatih Kurugollu
2004Run-Time Reconfiguration Management for Adaptive High-Performance Computing Systems.Mohamed Taher, Tarek A. El-Ghazawi
2004A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management.Jess Tabero, Julio Septin, Hortensia Mecha, Daniel Mozos
2004Comparative Study of SRT-Dividers in FPGA.Gustavo Sutter, Gery Bioul, Jean-Pierre Deschamps
2004Over 10Gbps String Matching Mechanism for Multi-stream Packet Scanning Systems.Yutaka Sugawara, Mary Inaba, Kei Hiraki
2004Power Analysis Attacks Against FPGA Implementations of the DES.Franois-Xavier Standaert, Siddika Berna rs, Jean-Jacques Quisquater, Bart Preneel
2004Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers.Valery Sklyarov, Iouliia Skliarova, Bruno Figueiredo Pimentel, Joel Arrais
2004A Hardware Implementation of a Content Based Image Retrieval Algorithm.Constantinos Skarpathiotis, Keith R. Dimond
2004Distribution of Bitstream-Level IP Cores for Functional Evaluation Using FPGAs.Rawat Siripokarpirom
2004A Novel FPGA Configuration Bitstream Generation Algorithm and Tool Development.Kostas Siozios, George Koutroumpezis, Konstantinos Tatas, Dimitrios Soudris, Adonios Thanailakis
2004Multiple Restricted Multiplication.Nalin Sidahao, George A. Constantinides, Peter Y. K. Cheung
2004Optimized Field Programmable Gate Array Based Function Evaluation.Nalin Sidahao
2004A System Level Resource Estimation Tool for FPGAs.Changchun Shi, James Hwang, Scott McMillan, Ann Root, Vinay Singh
2004SOC and RTOS: Managing IPs and Tasks Communications.Arthur Segard, Franois Verdier
2004A Structured Methodology for System-on-an-FPGA Design.N. Pete Sedcole, Peter Y. K. Cheung, George A. Constantinides, Wayne Luk
2004A Low Power FPAA for Wide Band Applications.Erik Schler, Luigi Carro
2004A Modular System for FPGA-Based TCP Flow Processing in High-Speed Networks.David V. Schuehler, John W. Lockwood
2004Java Technology in an FPGA.Martin Schoeberl
2004Using Logarithmic Arithmetic to Implement the Recursive Least Squares (QR) Algorithm in FPGA.Jan Schier, Antonin Hermanek
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