| 2005 | Timing Aware Interconnect Prediction Models for FPGAs. | Shankar Balachandran, Dinesh Bhatia |
| 2005 | Efficient FPGA Implementation of CORDIC Algorithm for Circular and Linear Coordinates. | Fabian Angarita, A. Perez-Pascual, T. Sansaloni, Javier Valls |
| 2005 | Efficient Hardware Architectures for Modular Multiplication on FPGAs. | David Narh Amanor, Viktor Bunimov, Christof Paar, Jan Pelzl, Manfred Schimmler |
| 2005 | An I/O mechanism on a Dynamically Reconfigurable Processor - Which should be moved: Data or Configuration? | Hideharu Amano, Shohei Abe, Katsuaki Deguchi, Yohei Hasegawa |
| 2005 | Safe PLD-based Programmable Controllers. | Jacobo lvarez, Jorge Marcos, Santiago Fernndez |
| 2005 | Integration of a NoC-Based Multimedia Processing Platform. | Tapani Ahonen, Jari Nurmi |
| 2005 | CPU-independent Assembler in an FPGA. | Georg Acher, Rainer Buchty, Carsten Trinitis |
| 2004 | Increasing Pipelined IP Core Utilization in Process Networks Using Exploration. | Claudiu Zissulescu, Bart Kienhuis, Ed F. Deprettere |
| 2004 | Automated Mapping of Coarse-Grain Pipelined Applications to FPGA Systems. | Heidi E. Ziegler |
| 2004 | Exploring Area/Delay Tradeoffs in an AES FPGA Implementation. | Joseph Zambreno, David Nguyen, Alok N. Choudhary |
| 2004 | Design and Evaluation of an FPGA Architecture for Software Protection. | Joseph Zambreno |
| 2004 | Stochastic Simulation for Biochemical Reactions on FPGA. | Masato Yoshimi, Yasunori Osana, Tomonori Fukushima, Hideharu Amano |
| 2004 | Three-Dimensional Dynamic Programming for Homology Search. | Yoshiki Yamaguchi, Tsutomu Maruyama, Akihiko Konagaya |
| 2004 | The Impact of Pipelining on Energy per Operation in Field-Programmable Gate Arrays. | Steven J. E. Wilton, Su-Shin Ang, Wayne Luk |
| 2004 | A High-Density Optically Reconfigurable Gate Array Using Dynamic Method. | Minoru Watanabe, Fuminori Kobayashi |
| 2004 | A Runtime Environment for Reconfigurable Hardware Operating Systems. | Herbert Walder, Marco Platzner |
| 2004 | An Instance-Specific Hardware Algorithm for Finding a Maximum Clique. | Shin'ichi Wakabayashi, Kenji Kikuchi |
| 2004 | Dynamic Prefetching in the Virtual Memory Window of Portable Reconfigurable Coprocessors. | Miljan Vuletic, Laura Pozzi, Paolo Ienne |
| 2004 | Code Re-ordering for a Class of Reconfigurable Microprocessors. | Brian F. Veale, John K. Antonio, Monte P. Tull |
| 2004 | A Reconfigurable Communication Processor Compatible with Different Industrial Fieldbuses. | Mara Dolores Valds, Miguel A. Domnguez, Mara Jos Moure, Camilo Quintns |
| 2004 | Hardware and Software Debugging of FPGA Based Microprocessor Systems Through Debug Logic Insertion. | Mario Garca-Valderas, Eduardo de la Torre, F. Ariza, Teresa Riesgo |
| 2004 | On-Demand FPGA Run-Time System for Dynamical Reconfiguration with Adaptive Priorities. | Michael Ullmann, Michael Hbner, Bjrn Grimm, Jrgen Becker |
| 2004 | Reconfigurable Systems Emerge. | Nick Tredennick, Brion Shimamoto |
| 2004 | An Evolvable Hardware Tutorial. | Jim Trresen |
| 2004 | Design and Implementation of a CFAR Processor for Target Detection. | Csar Torres-Huitzil, Ren Cumplido-Parra, Santos Lpez-Estrada |