| 2009 | Multi-functional interconnect co-optimization for fast and reliable 3D stacked ICs. | Young-Joon Lee, Rohan Goel, Sung Kyu Lim |
| 2009 | An efficient wakeup scheduling considering resource constraint for sensor-based power gating designs. | Ming-Chao Lee, Yu-Ting Chen, Yo-Tzu Cheng, Shih-Chieh Chang |
| 2009 | An accurate and efficient performance analysis approach based on queuing model for network on chip. | Ming-che Lai, Lei Gao, Nong Xiao, Zhiying Wang |
| 2009 | DeltaSyn: An efficient logic difference optimizer for ECO synthesis. | Smita Krishnaswamy, Haoxing Ren, Nilesh Modi, Ruchir Puri |
| 2009 | A study of Through-Silicon-Via impact on the 3D stacked IC layout. | Dae Hyun Kim, Krit Athikulwongse, Sung Kyu Lim |
| 2009 | An elegant hardware-corroborated statistical repair and test methodology for conquering aging effects. | Rouwaida Kanj, Rajiv V. Joshi, Chad Adams, James D. Warnock, Sani R. Nassif |
| 2009 | Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint. | Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak |
| 2009 | Interpolating functions from large Boolean relations. | Jie-Hong Roland Jiang, Hsuan-Po Lin, Wei-Lun Hung |
| 2009 | A hybrid local-global approach for multi-core thermal management. | Ramkumar Jayaseelan, Tulika Mitra |
| 2009 | Adaptive sampling for efficient failure probability analysis of SRAM cells. | Javid Jaffari, Mohab Anis |
| 2009 | A contamination aware droplet routing algorithm for digital microfluidic biochips. | Tsung-Wei Huang, Chun-Hsien Lin, Tsung-Yi Ho |
| 2009 | Interpolant generation without constructing resolution graph. | Chih-Jen Hsu, Shao-Lun Huang, Chi-An Wu, Chung-Yang Huang |
| 2009 | Simultaneous layout migration and decomposition for double patterning technology. | Chin-Hsiung Hsu, Yao-Wen Chang, Sani R. Nassif |
| 2009 | Nonvolatile memristor memory: Device characteristics and design implications. | Yenpo Ho, Garng M. Huang, Peng Li |
| 2009 | Quantifying robustness metrics in parameterized static timing analysis. | Khaled R. Heloue, Chandramouli V. Kashyap, Farid N. Najm |
| 2009 | Maximizing performance of thermally constrained multi-core processors by dynamic voltage and frequency control. | Vinay Hanumaiah, Sarma B. K. Vrudhula, Karam S. Chatha |
| 2009 | Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography. | Mohit Gupta, Kwangok Jeong, Andrew B. Kahng |
| 2009 | QLMOR: A new projection-based approach for nonlinear model order reduction. | Chenjie Gu |
| 2009 | Binning optimization based on SSTA for transparently-latched circuits. | Min Gong, Hai Zhou, Jun Tao, Xuan Zeng |
| 2009 | A framework for early and systematic evaluation of design rules. | Rani S. Ghaida, Puneet Gupta |
| 2009 | IPR: In-Place Reconfiguration for FPGA fault tolerance. | Zhe Feng, Yu Hu, Lei He, Rupak Majumdar |
| 2009 | The epsilon-approximation to discrete VT assignment for leakage power minimization. | Yujia Feng, Shiyan Hu |
| 2009 | A hierarchical floating random walk algorithm for fabric-aware 3D capacitance extraction. | Tarek A. El-Moselhy, Ibrahim M. Elfadel, Luca Daniel |
| 2009 | TAPE: Thermal-aware agent-based power econom multi/many-core architectures. | Thomas Ebi, Mohammad Abdullah Al Faruque, Jrg Henkel |
| 2009 | Final-value ODEs: Stable numerical integration and its application to parallel circuit analysis. | Wei Dong, Peng Li |