| 2004 | On breakable cyclic definitions. | Jie-Hong Roland Jiang, Alan Mishchenko, Robert K. Brayton |
| 2004 | A metal and via maskset programmable VLSI design methodology using PLAs. | Nikhil Jayakumar, Sunil P. Khatri |
| 2004 | On interactions between routing and detailed placement. | Devang Jariwala, John Lillis |
| 2004 | Hardware/software managed scratchpad memory for embedded system. | Andhi Janapsatya, Sri Parameswaran, Aleksandar Ignjatovic |
| 2004 | Fast simulation of VLSI interconnects. | Jitesh Jain, Cheng-Kok Koh, Venkataramanan Balakrishnan |
| 2004 | Computation of signal threshold crossing times directly from higher order moments. | Yehea I. Ismail, Chirayu S. Amin |
| 2004 | Physical placement driven by sequential timing analysis. | Aaron P. Hurst, Philip Chong, Andreas Kuehlmann |
| 2004 | Multilevel expansion-based VLSI placement with blockages. | Bo Hu, Malgorzata Marek-Sadowska |
| 2004 | Application-specific buffer space allocation for networks-on-chip router design. | Jingcao Hu, Radu Marculescu |
| 2004 | Analysis and evaluation of a hybrid interconnect structure for FPGAs. | Renqiu Huang, Ranga Vemuri |
| 2004 | High-level synthesis using computation-unit integrated memories. | Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha |
| 2004 | A vectorless estimation of maximum instantaneous current for sequential circuits. | Cheng-Tao Hsieh, Jian-Cheng Lin, Shih-Chieh Chang |
| 2004 | Factoring and eliminating common subexpressions in polynomial expressions. | Anup Hosangadi, Farzan Fallah, Ryan Kastner |
| 2004 | Configuration bitstream compression for dynamically reconfigurable FPGAs. | Lei He, Tulika Mitra, Weng-Fai Wong |
| 2004 | Variability in sub-100nm SRAM designs. | Raymond A. Heald, Ping Wang |
| 2004 | Timing analysis considering spatial power/ground level variation. | Masanori Hashimoto, Junji Yamaguchi, Hidetoshi Onodera |
| 2004 | Towards formal verification of analog designs. | Smriti Gupta, Bruce H. Krogh, Rob A. Rutenbar |
| 2004 | Delay noise pessimism reduction by logic correlations. | Alexey Glebov, Sergey Gavrilov, R. Soloviev, Vladimir Zolotov, Murat R. Becer, Chanhee Oh, Rajendran Panda |
| 2004 | Formal derivation of optimal active shielding for low-power on-chip buses. | Maged Ghoneima, Yehea I. Ismail |
| 2004 | A unified theory of timing budget management. | Soheil Ghiasi, Elaheh Bozorgzadeh, Siddharth Choudhuri, Majid Sarrafzadeh |
| 2004 | Analyzing software influences on substrate noise: an ADC perspective. | Frank Ghenassia, Narayanan Vijaykrishnan, Mary Jane Irwin |
| 2004 | Exact and heuristic approaches to input vector control for leakage power reduction. | Feng Gao, John P. Hayes |
| 2004 | Efficient SAT-based unbounded symbolic model checking using circuit cofactoring. | Malay K. Ganai, Aarti Gupta, Pranav Ashar |
| 2004 | Simultaneous short-path and long-path timing optimization for FPGAs. | Ryan Fung, Vaughn Betz, William Chow |
| 2004 | SPRIM: structure-preserving reduced-order interconnect macromodeling. | Roland W. Freund |