| 2002 | Robust and passive model order reduction for circuits containing susceptance elements. | Hui Zheng, Lawrence T. Pileggi |
| 2002 | Conflict driven learning in a quantified Boolean Satisfiability solver. | Lintao Zhang, Sharad Malik |
| 2002 | A technology-independent CAD tool for ESD protection device extraction: ESDExtractor. | Rouying Zhan, Haigang Feng, Qiong Wu, Guang Chen, Xiaokang Guan, Albert Z. Wang |
| 2002 | General framework for removal of clock network pessimism. | Jindrich Zejda, Paul Frain |
| 2002 | Simplifying Boolean constraint solving for random simulation-vector generation. | Jun Yuan, Ken Albin, Adnan Aziz, Carl Pixley |
| 2002 | GSTE through a case study. | Jin Yang, Amit Goel |
| 2002 | Timing-driven placement using design hierarchy guided constraint generation. | Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh |
| 2002 | Post global routing RLC crosstalk budgeting. | Jinjun Xiong, Jun Chen, James D. Z. Ma, Lei He |
| 2002 | ECO algorithms for removing overlaps between power rails and signal wires. | Hua Xiang, Kai-Yuan Chao, D. F. Wong |
| 2002 | Conflict driven techniques for improving deterministic test pattern generation. | Chen Wang, Sudhakar M. Reddy, Irith Pomeranz, Xijiang Lin, Janusz Rajski |
| 2002 | Optimized power-delay curve generation for standard cell ICs. | Miodrag Vujkovic, Carl Sechen |
| 2002 | Optimization of a fully integrated low power CMOS GPS receiver. | Peter J. Vancorenland, Philippe Coppejans, Wouter De Cock, Paul Leroux, Michiel Steyaert |
| 2002 | On the difference between two widely publicized methods for analyzing oscillator phase behavior. | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen |
| 2002 | Dynamic compilation for energy adaptation. | Priya Unnikrishnan, Guangyu Chen, Mahmut T. Kandemir, D. R. Mudgett |
| 2002 | Layout-driven resource sharing in high-level synthesis. | Junhyung Um, Jae-Hoon Kim, Taewhan Kim |
| 2002 | On mask layout partitioning for electron projection lithography. | Ruiqi Tian, Ronggang Yu, Xiaoping Tang, D. F. Wong |
| 2002 | Gate sizing using Lagrangian relaxation combined with a fast gradient-based pre-processing step. | Hiran Tennakoon, Carl Sechen |
| 2002 | Synthesis of custom processors based on extensible platforms. | Fei Sun, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha |
| 2002 | Hardware/software partitioning of software binaries. | Greg Stitt, Frank Vahid |
| 2002 | Predictability: definition, ananlysis and optimization. | Ankur Srivastava, Majid Sarrafzadeh |
| 2002 | Implicit treatment of substrate and power-ground losses in return-limited inductance extraction. | Dipak Sitaram, Yu Zheng, Kenneth L. Shepard |
| 2002 | Topologically constrained logic synthesis. | Subarnarekha Sinha, Alan Mishchenko, Robert K. Brayton |
| 2002 | Incremental placement for layout driven optimizations on FPGAs. | Deshanand P. Singh, Stephen Dean Brown |
| 2002 | Interface specification for reconfigurable components. | Satnam Singh |
| 2002 | A novel scan architecture for power-efficient, rapid test. | Ozgur Sinanoglu, Alex Orailoglu |