| 2001 | A Symbolic Simulation-Based Methodology for Generating Black-Box Timing Models of Custom Macrocells. | Clayton B. McDonald, Randal E. Bryant |
| 2001 | System-Level Power/Performance Analysis of Portable Multimedia Systems Communicating over Wireless Channels. | Radu Marculescu, Amit Nandi, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli |
| 2001 | Application-Driven Processor Design Exploration for Power-Performance Trade-off Analysis. | Diana Marculescu, Anoop Iyer |
| 2001 | Formulae and Applications of Interconnect Estimation Considering Shield Insertion and Net Ordering. | James D. Z. Ma, Lei He |
| 2001 | An Integrated Data Path Optimization for Low Power Based on Network Flow Method. | Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu |
| 2001 | Behavioral Modeling of Analog Circuits by Wavelet Collocation Method. | Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling |
| 2001 | Fast 3-D Inductance Extraction in Lossy Multi-Layer Substrate. | Minqing Liu, Tiejun Yu, Wayne Wei-Ming Dai |
| 2001 | Efficient Performance Estimation for General Real-Time Task Systems. | Hongchao (Stephanie) Liu, Xiaobo Sharon Hu |
| 2001 | Challenges in Power-Ground Integrity. | Shen Lin, Norman Chang |
| 2001 | System Level Design with Spade: an M-JPEG Case Study. | Paul Lieverse, Todor P. Stefanov, Pieter van der Wolf, Ed F. Deprettere |
| 2001 | On the Signal Bounding Problem in Timing Analysis. | Jin-Fuw Lee, Daniel L. Ostapko, Jeffery Soreff, C. K. Wong |
| 2001 | Embedded Tutorial: CAD Solutions and Outstanding Challenges for Mixed-Signal and RF IC Design. | Domine Leenaerts, Rob A. Rutenbar, Georges G. E. Gielen |
| 2001 | Power Grid Transient Simulation in Linear Time Based on Transmission-Line-Modeling Alternating-Direction-Implicit Method. | Yu-Min Lee, Charlie Chung-Ping Chen |
| 2001 | The Design and Optimization of SOC Test Solutions. | Erik Larsson, Zebo Peng, Gunnar Carlsson |
| 2001 | Congestion Aware Layout Driven Logic Synthesis. | Thomas Kutzschebauch, Leon Stok |
| 2001 | Will Nanotechnology Change the Way We Design and Verify Systems? (Panel). | Andreas Kuehlmann, Robert W. Dutton, Paul D. Franzon, Seth Copen Goldstein, Philip Luekes, Eric Parker, Thomas N. Theis |
| 2001 | Static Scheduling of Multi-Domain Memories For Functional Verification. | Murali Kudlugi, Charles Selvidge, Russell Tessier |
| 2001 | ASF: A Practical Simulation-Based Methodology for the Synthesis of Custom Analog Circuits. | Michael Krasnicki, Rodney Phelps, James R. Hellums, Mark McClung, Rob A. Rutenbar, L. Richard Carley |
| 2001 | Multigrid-Like Technique for Power Grid Analysis. | Joseph N. Kozhaya, Sani R. Nassif, Farid N. Najm |
| 2001 | Behavior-to-Placed RTL Synthesis with Performance-Driven Placement. | Daehong Kim, Jinyong Jung, Sunghyun Lee, Jinhwan Jeon, Kiyoung Choi |
| 2001 | Instruction Generation for Hybrid Reconfigurable Systems. | Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh |
| 2001 | Improving Memory Energy Using Access Pattern Classification. | Mahmut T. Kandemir, Ugur Sezer, Victor Delaluz |
| 2001 | Highly Accurate Fast Methods for Extraction and Sparsification of Substrate Coupling Based on Low-Rank Approximation. | Joe Kanapka, Jacob K. White |
| 2001 | On Identifying Don't Care Inputs of Test Patterns for Combinational Circuits. | Seiji Kajihara, Kohei Miyase |
| 2001 | Low Power System Scheduling and Synthesis. | Niraj K. Jha |