| 2000 | Decomposing Refinement Proofs Using Assume-Guarantee Reasoning. | Thomas A. Henzinger, Shaz Qadeer, Sriram K. Rajamani |
| 2000 | Diagnosis of Interconnect Faults in Cluster-Based FPGA Architectures. | Ian G. Harris, Russell Tessier |
| 2000 | Deterministic Test Pattern Generation Techniques for Sequential Circuits. | Ilker Hamzaoglu, Janak H. Patel |
| 2000 | MIST: An Algorithm for Memory Miss Traffic Management. | Peter Grun, Nikil D. Dutt, Alexandru Nicolau |
| 2000 | Counterexample-Guided Choice of Projections in Approximate Symbolic Model Checking. | Shankar G. Govindaraju, David L. Dill |
| 2000 | DAISY: A Simulation-Based High-Level Synthesis Tool for Delta-Sigma Modulators. | Kenneth Francken, Peter J. Vancorenland, Georges G. E. Gielen |
| 2000 | General Models for Optimum Arbitrary-Dimension FPGA Switch Box Designs. | Hongbing Fan, Jiping Liu, Yu-Liang Wu |
| 2000 | Latency-Guided On-Chip Bus Network Design. | Milenko Drinic, Darko Kirovski, Seapahn Meguerdichian, Miodrag Potkonjak |
| 2000 | Provably Good Global Buffering Using an Available Buffer Block Plan. | Feodor F. Dragan, Andrew B. Kahng, Ion I. Mandoiu, Sudhakar Muddu, Alexander Zelikovsky |
| 2000 | How to Efficiently Capture On-Chip Inductance Effects: Introducing a New Circuit Element K. | Anirudh Devgan, Hao Ji, Wayne Wei-Ming Dai |
| 2000 | Computing Phase Noise Eigenfunctions Directly from Steady-State Jacobian Matrices. | Alper Demir, David E. Long, Jaijeet S. Roychowdhury |
| 2000 | Modelling and Analysis of Communication Circuit Performance Using Markov Chains and Efficient Graph Representations. | Alper Demir, Peter Feldmann |
| 2000 | Incremental CAD. | Olivier Coudert, Jason Cong, Sharad Malik, Majid Sarrafzadeh |
| 2000 | Observability Analysis of Embedded Software for Coverage-Directed Validation. | Jos C. Costa, Srinivas Devadas, Jos Monteiro |
| 2000 | Physical Planning with Retiming. | Jason Cong, Sung Kyu Lim |
| 2000 | Potential Slack: An Effective Metric of Combinational Circuit Performance. | Chunhong Chen, Xiaojian Yang, Majid Sarrafzadeh |
| 2000 | Generalized FDTD-ADI: An Unconditionally Stable Full-Wave Maxwell's Equations Solver for VLSI Interconnect Modeling. | Charlie Chung-Ping Chen, Tae-Woo Lee, Narayanan Murugesan, Susan C. Hagness |
| 2000 | Switching Window Computation for Static Timing Analysis in Presence of Crosstalk Noise. | Pinhong Chen, Desmond Kirkpatrick, Kurt Keutzer |
| 2000 | Miller Factor for Gate-Level Coupling Delay Calculation. | Pinhong Chen, Desmond Kirkpatrick, Kurt Keutzer |
| 2000 | Simultaneous Gate Sizing and Fanout Optimization. | Wei Chen, Cheng-Ta Hsieh, Massoud Pedram |
| 2000 | Synthesis of CMOS Domino Circuits for Charge Sharing Alleviation. | Ching-Hwa Cheng, Shih-Chieh Chang, Shin-De Li, Wen-Ben Jone, Jinn-Shyan Wang |
| 2000 | Wire Reconnections Based on Implication Flow Graph. | Shih-Chieh Chang, Zhong-Zhen Wu, He-Zhe Yu |
| 2000 | Multilevel Optimization for Large-Scale Circuit Placement. | Tony F. Chan, Jason Cong, Tianming Kong, Joseph R. Shinnerl |
| 2000 | Partial Simulation-Driven ATPG for Detection and Diagnosis of Faults in Analog Circuits. | Sudip Chakrabarti, Abhijit Chatterjee |
| 2000 | Effects of Global Interconnect Optimizations on Performance Estimation of Deep Submicron Design. | Yu Cao, Chenming Hu, Xuejue Huang, Andrew B. Kahng, Sudhakar Muddu, Dirk Stroobandt, Dennis Sylvester |