| 1997 | Partitioning Under Timing and Area Constraints. | Gregory Tumbush, Dinesh Bhatia |
| 1997 | Pseudo-Random Pattern Testing of Bridging Faults. | Nur A. Touba, Edward J. McCluskey |
| 1997 | Asynchronous Transpose-Matrix Architectures. | Jos A. Tierno, Prabhakar Kudva |
| 1997 | Synthesis of Delay Verifiable Sequential Circuits using Partial Enhanced Scan. | Ramesh C. Tekumalla, Premachandran R. Menon |
| 1997 | Elastic History Buffer: A Low-Cost Method to Improve Branch Prediction Accuracy. | Maria-Dana Tarlescu, Kevin B. Theobald, Guang R. Gao |
| 1997 | An Efficient Multi-Way Algorithm for Balanced Partitioning of VLSI Circuits. | X. Tan, J. Tong, P. Tan, Nohpill Park, Fabrizio Lombardi |
| 1997 | TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model. | Akihiro Takamura, Masashi Kuwako, Masashi Imai, Taro Fujii, Motokazu Ozawa, Izumi Fukasaku, Yoichiro Ueno, Takashi Nanya |
| 1997 | A Floating Point Divider using Redundant Binary Circuits and an Asynchronous Clock Scheme. | Hiroaki Suzuki, Hiroshi Makino, Koichiro Mashiko, Hisanori Hamano |
| 1997 | A Universal Pezaris Array Multiplier Generator for SRAM-Based FPGAs. | Jrn Stohmann, Erich Barke |
| 1997 | Memory Traffic and Data Cache Behavior of an MPEG-2 Software Decoder. | Peter Soderquist, Miriam Leeser |
| 1997 | Design Methodology for the High-Performance G4 S/390. | Kenneth L. Shepard, Sean M. Carey, Daniel K. Beece, Robert F. Hatch, Gregory A. Northrop |
| 1997 | Practical Issues of Interconnect Analysis in Deep Submicron Integrated Circuits. | Kenneth L. Shepard |
| 1997 | Optimizing CMOS Implementations of the C-element. | Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry |
| 1997 | BIST-Based Fault Diagnosis in the Presence of Embedded Memories. | Jacob Savir |
| 1997 | A Brief History of the Future of Semiconductor Electronic Design Automation. | Ronald A. Rohrer |
| 1997 | On Effective Data Supply For Multi-Issue Processors. | Jude A. Rivers, Edward S. Tam, Edward S. Davidson |
| 1997 | Allocation and Data Arrival Design of Hard Real-time Systems. | David L. Rhodes, Wayne H. Wolf |
| 1997 | Dynamic Reordering in a Breadth-First Manipulation Based BDD Package: Challenges and Solutions. | Rajeev K. Ranjan, Wilsin Gosti, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1997 | Vector Restoration Based Static Compaction of Test Sequences for Synchronous Sequential Circuits. | Irith Pomeranz, Sudhakar M. Reddy |
| 1997 | A Low Power Approach to Floating Point Adder Design. | R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili |
| 1997 | Fast Cache Access with Full-Map Block Directory. | Jih-Kwon Peir, Windsor W. Hsu |
| 1997 | Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures. | David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David R. Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick |
| 1997 | Power Constrained Design of Multiprocessor Interconnection Networks. | Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchili, David E. Schimmel |
| 1997 | Fast Low-Energy VLSI Binary Addition. | Keshab K. Parhi |
| 1997 | A Data Alignment Technique for Improving Cache Performance. | Preeti Ranjan Panda, Hiroshi Nakamura, Nikil D. Dutt, Alexandru Nicolau |