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On-Line Testing and Robust System Design

IOLTS

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering · Software Engineering

Papers indexed

1,346

2000–2026

Papers per year

200069 peak2026

IOLTS papers

1,346 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2017Trojan circuits preventing and masking in sequential circuits.Anjela Yu. Matrosova, Eugeniy Mitrofanov, Sergei Ostanin, Irina Kirienko
2017Automating wafer-level test of uncooled infrared detectors using wafer-prober.Mohamed Makhlouf, Diana Goller, Lutz Gendrisch, Stephan Kolnsberg, Franz Vogt, Alexander Utz, Dirk Weiler, Holger Vogt
2017Thermal laser attack and high temperature heating on HfO2-based OxRAM cells.Alexis Krakovinsky, Marc Bocquet, Romain Wacquez, Jean Coignus, Jean-Michel Portal
2017SICTA: A superimposed in-circuit fault tolerant architecture for SRAM-based FPGAs.Alexandra Kourfali, Amit Kulkarni, Dirk Stroobandt
2017A new 3-bit burst-error correcting code.Alexander Klockmann, Georg Georgakos, Michael Gssel
2017On-line monitoring of system health using on-chip SRAMs as a wearout sensor.Woongrae Kim, Taizhi Liu, Linda Milor
2017Jamming resistant encoding for non-uniformly distributed information.Batya Karp, Yerucham Berkowitz, Osnat Keren
2017Weighted logic locking: A new approach for IC piracy protection.Nikolaos Karousos, Konstantinos Pexaras, Irene G. Karybali, Emmanouil Kalligeros
2017A cost-efficient dependability management framework for self-aware system-on-chips based on IEEE 1687.Ahmed Ibrahim, Hans G. Kerkhoff
2017Controller augmentation and test point insertion at RTL for concurrent operational unit testing.Toshinori Hosokawa, Shun Takeda, Hiroshi Yamazaki, Masayoshi Yoshimura
2017Hardware Trojans classification for gate-level netlists using multi-layer neural networks.Kento Hasegawa, Masao Yanagisawa, Nozomu Togawa
2017Comprehensive analysis of sequential circuits vulnerability to transient faults using SMT.Ghaith Bany Hamad, Ghaith Kazma, Otmane At Mohamed, Yvon Savaria
2017Instruction-based self-test for delay faults maximizing operating temperature.Nihar Hage, Rohini Gulve, Masahiro Fujita, Virendra Singh
2017Design flows for resilient energy-efficient systems.Mohammad Saber Golanbari, Mehdi Baradaran Tahoori
2017An effective functional safety infrastructure for system-on-chips.Christophe Eychenne, Yervant Zorian
2017Deterministic network on chip for deploying real time applications on many-core processors.Stefano Esposito, Massimo Violante
2017An on-line test strategy and analysis for a 1T1R crossbar memory.Manuel Escudero-Lopez, Francesc Moll, Antonio Rubio, Ioannis Vourkas
2017Cache timing attacks countermeasures and error detection in Euclidean addition chains based scalar multiplication algorithm for elliptic curves.Fangan-Yssouf Dosso, Pascal Vron
2017Field profiling & monitoring of payload transistors in FPGAs.Da Cheng, Amitava Majumdar, Xiaobao Wang, Nui Chong
2017Investigation of critical path selection for in-situ monitors insertion.Florian Cacho, Ahmed Benhassain, Riddhi Jitendrakumar Shah, Souhir Mhira, Vincent Huard, Lorena Anghel
2017On the in-field test of embedded memories.Paolo Bernardi, Marco Restifo, Ernesto Snchez, Matteo Sonza Reorda
2017Robustness in automotive electronics: An industrial overview of major concerns.Ulrich Backhausen, Oscar Ballan, Paolo Bernardi, Sergio de Luca, Julie Henzler, Thomas Kern, Davide Piumatti, Thomas Rabenalt, Krishnapriya Chakiat Ramamoorthy, Ernesto Snchez, Alessandro Sansonetti, Rudolf Ullmann, Federico Venini, Robert Wiesner
2017Assessment of the amplitude-duration criterion for SET/SEU robustness evaluation.Marko S. Andjelkovic, Milos Krstic, Rolf Kraemer
20176T CMOS SRAMs reliability monitoring through stability measurements.Bartomeu Alorda, Gabriel Torrens, Sebasti A. Bota
2017EDA support for functional safety - How static and dynamic failure analysis can improve productivity in the assessment of functional safety.Dan Alexandrescu, Adrian Evans, Maximilien Glorieux, Issam Nofal
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