| 2016 | Advanced double-sampling architectures. | Michael Nicolaidis, Michael G. Dimopoulos |
| 2016 | Reusing logic masking to facilitate path-delay-based hardware Trojan detection. | Arash Nejat, David Hly, Vincent Beroulle |
| 2016 | NBTI aging evaluation of PUF-based differential architectures. | Mohd Syafiq Mispan, Basel Halak, Mark Zwolinski |
| 2016 | A fault-tolerant sequential circuit design for SAFs and PDFs soft errors. | Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko, Ekaterina Nikolaeva |
| 2016 | Hardware-simulation correlation of timing error detection performance of software-based error detection mechanisms. | Yutaka Masuda, Masanori Hashimoto, Takao Onoye |
| 2016 | ACM: Accurate crosstalk modeling to predict channel delay in Network-on-Chips. | Zeinab Mahdavi, Zahra Shirmohammadi, Seyed Ghassem Miremadi |
| 2016 | Tackling long duration transients in sequential logic. | Erol Koser, Walter Stechele |
| 2016 | Cache-aware reliability evaluation through LLVM-based analysis and fault injection. | Maha Kooli, Giorgio Di Natale, Alberto Bosio |
| 2016 | Binary decision diagram to design balanced secure logic styles. | Hyunmin Kim, Seokhie Hong, Bart Preneel, Ingrid Verbauwhede |
| 2016 | Leakage mitigation for low power microcontroller design in 40nm for Internet-of-Things (IoT). | Ajay Kapoor, Nur Engin, Johan Verdaasdonk |
| 2016 | Variations-tolerant 9T SRAM circuit with robust and low leakage SLEEP mode. | Hailong Jiao, Yongmin Qiu, Volkan Kursun |
| 2016 | Online monitoring of NBTI and HCD in beta-multiplier circuits. | Theodor Hillebrand, Maike Taddiken, Konstantin Tscherkaschin, Steffen Paul, Dagmar Peters-Drolshagen |
| 2016 | Hardware Trojans classification for gate-level netlists based on machine learning. | Kento Hasegawa, Masaru Oya, Masao Yanagisawa, Nozomu Togawa |
| 2016 | Susceptible workload driven selective fault tolerance using a probabilistic fault model. | Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski |
| 2016 | REMO: Redundant execution with minimum area, power, performance overhead fault tolerant architecture. | Shoba Gopalakrishnan, Virendra Singh |
| 2016 | Efficient fault tolerant parallel matrix-vector multiplications. | Zhen Gao, Pedro Reviriego, Juan Antonio Maestro |
| 2016 | Recovery of performance degradation in defective branch target buffers. | Filippos Filippou, Georgios Keramidas, Michail Mavropoulos, Dimitris Nikolos |
| 2016 | Online time interference detection in mixed-criticality applications on multicore architectures using performance counters. | Stefano Esposito, Massimo Violante, Marco Sozzi, Marco Terrone, Massimo Traversone |
| 2016 | Modeling RTL fault models behavior to increase the confidence on TSIM-based fault injection. | Jaime Espinosa, Carles Hernndez, Jaume Abella |
| 2016 | Revisiting software-based soft error mitigation techniques via accurate error generation and propagation models. | Mojtaba Ebrahimi, Maryam Rashvand, Firas Kaddachi, Mehdi Baradaran Tahoori, Giorgio Di Natale |
| 2016 | Evaluating application-aware soft error effects in digital circuits without fault injections or probabilistic computations. | K. Chibani, Michele Portolan, Rgis Leveugle |
| 2016 | Single-event performance of differential flip-flop designs and hardening implication. | Rongmei Chen, Enxia Zhang, Bharat L. Bhuva |
| 2016 | HLS-based sensitivity-inductive soft error mitigation for satellite communication systems. | Xiang Chen, Wenhui Yang, Ming Zhao, Jing Wang |
| 2016 | Comparison of RTL fault models for the robustness evaluation of aerospace FPGA devices. | Romain Champon, Vincent Beroulle, Athanasios Papadimitriou, David Hly, Gilles Genvrier, Frdric Czilly |
| 2016 | Automatic generation of stimuli for fault diagnosis in IEEE 1687 networks. | Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson |