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On-Line Testing and Robust System Design

IOLTS

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering · Software Engineering

Papers indexed

1,346

2000–2026

Papers per year

200069 peak2026

IOLTS papers

1,346 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2016Analysis of BTI aging of level shifters.Jiajing Cai, Basel Halak, Daniele Rossi
2016Activity profiling: Review of different solutions to develop reliable and performant design.Florian Cacho, Ahmed Benhassain, Souhir Mhira, Ajith Sivadasan, Vincent Huard, P. Cathelin, Vincent Knopik, Abhishek Jain, C. R. Parthasarathy, Lorena Anghel
2016A hybrid self-diagnosis mechanism with defective nodes locating and attack detection for parallel computing systems.Lake Bu, Mark G. Karpovsky
2016Hot-carrier and BTI damage distinction for high performance digital application in 28nm FDSOI and 28nm LP CMOS nodes.Alain Bravaix, M. Saliva, Florian Cacho, X. Federspiel, Cheikh Ndiaye, Souhir Mhira, Edith Kussener, E. Pauly, Vincent Huard
2016An on-line test solution for addressing interconnect shorts in on-chip networks.Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas
2016An odd-even scheme to prevent a packet from being corrupted and dropped in fault tolerant NoCs.Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka
2016On the robustness of DCT-based compression algorithms for space applications.Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Grschwin Fey, Jan-Gerd Mess, Robert Schmidt
2016SET response of a SEL protection switch for 130 and 250 nm CMOS technologies.Marko S. Andjelkovic, Aleksandar Ilic, Vladimir Petrovic, Miljana Nenadovic, Zoran Stamenkovic, Goran S. Ristic
2016On-line write margin estimator to monitor performance degradation in SRAM cores.Bartomeu Alorda, Cristian Carmona, Gabriel Torrens, Sebasti A. Bota
2016A high performance scan flip-flop design for serial and mixed mode scan test.Satyadev Ahlawat, Jaynarayan T. Tudu, Anzhela Yu. Matrosova, Virendra Singh
2016Analytic models for crossbar read operation.Adedotun Adeyemo, Xiaohan Yang, Anu Bala, Jimson Mathew, Abusaleh M. Jabir
2015Fault-tolerant system for catastrophic faults in AMR sensors.Andreina Zambrano, Hans G. Kerkhoff
2015Workload characterization and prediction: A pathway to reliable multi-core systems.Monir Zaman, Ali Ahmadi, Yiorgos Makris
2015OPUF: Obfuscation logic based physical unclonable function.Jing Ye, Yu Hu, Xiaowei Li
2015Design space exploration and optimization of a Hybrid Fault-Tolerant Architecture.Imran Wali, Arnaud Virazel, Alberto Bosio, Patrick Girard, Matteo Sonza Reorda
2015Bayesian network early reliability evaluation analysis for both permanent and transient faults.Alessandro Vallero, Alessandro Savino, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Gianfranco Politano, Dimitris Gizopoulos, Stefano Di Carlo
2015Real-time on-chip supply voltage sensor and its application to trace-based timing error localization.Miho Ueno, Masanori Hashimoto, Takao Onoye
2015Adaptive healing procedure for lifetime improvement in Wireless Sensor Networks.Diane Tchuani Tchakonte, Emmanuel Simeu, Maurice Tchuent
2015Self-awareness and self-learning for resiliency in real-time systems.Mehdi Baradaran Tahoori, Abhijit Chatterjee, Krishnendu Chakrabarty, Abhishek Koneru, Arunkumar Vijayan, Debashis Banerjee
2015Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis.Anis Souari, Claude Thibeault, Yves Blaquire, Raoul Velazco
2015Toward efficient check-pointing and rollback under on-demand SBST in chip multi-processors.Michael A. Skitsas, Chrysostomos Nicopoulos, Maria K. Michael
2015Defect diagnosis algorithms for a field programmable interconnect network embedded in a Very Large Area Integrated Circuit.Gontran Sion, Yves Blaquire, Yvon Savaria
2015Efficient on-line fault-tolerance for the preconditioned conjugate gradient method.Alexander Schll, Claus Braun, Michael A. Kochte, Hans-Joachim Wunderlich
2015Identifying aging-aware representative paths in processors.Chiara Sandionigi, Olivier Hron
2015BTI and leakage aware dynamic voltage scaling for reliable low power cache memories.Daniele Rossi, Vasileios Tenentes, S. Saqib Khursheed, Bashir M. Al-Hashimi
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