| 2003 | On-Line Error Detecting Constant Delay Adder. | Whitney J. Townsend, Jacob A. Abraham, Parag K. Lala |
| 2003 | A Design Method for Embedded Self-Testing t-UED and BUED Code Checkers. | Steffen Tarnick |
| 2003 | An Analog Checker With Input-Relative Tolerance for Duplicate Signals. | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
| 2003 | Crosstalk Effect Minimization for Encoded Busses. | L. Di Silvio, Daniele Rossi, Cecilia Metra |
| 2003 | Fault Injection in Digital Logic Circuits at the VHDL Level. | S. R. Seward, Parag K. Lala |
| 2003 | Power Consumption of Fault Tolerant Codes: the Active Elements. | Daniele Rossi, Steven V. E. S. van Dijk, Richard P. Kleihorst, Andr K. Nieuwland, Cecilia Metra |
| 2003 | Accurate and Efficient Analysis of Single Event Transients in VLSI Circuits. | Matteo Sonza Reorda, Massimo Violante |
| 2003 | A Configurable Built in Current Sensor for Mixed Signal Circuit Testing. | Rodrigo Picos, Joan Font, Eugeni Isern, Miquel Roca, Eugenio Garca |
| 2003 | Control Signal Protection For High Performance Processors. | Matthias Pflanz, Heinrich Theodor Vierhaus |
| 2003 | A Model for Transient Fault Propagation in Combinatorial Logic. | Martin Omaa, Giacinto Papasso, Daniele Rossi, Cecilia Metra |
| 2003 | Foundation of Combined Datapath and Controller Self-checking Design. | Petros Oikonomakos, Mark Zwolinski |
| 2003 | A Modulo p Checked Self-Checking Carry Select Adder. | Vitalij Ocheretnij, Michael Gssel, Egor S. Sogomonyan, Daniel Marienfeld |
| 2003 | An Efficient BIST scheme for High-Speed Adders. | Dimitris G. Nikolos, Dimitris Nikolos, Haridimos T. Vergos, Costas Efstathiou |
| 2003 | The positive effect on IC yield of embedded Fault Tolerance for SEUs. | Andr K. Nieuwland, Richard P. Kleihorst |
| 2003 | Memory Built-In Self-Repair for Nanotechnologies. | Michael Nicolaidis, Nadir Achouri, Lorena Anghel |
| 2003 | On-Line Testable Decimation Filter Design for AMS Systems. | Mohammad A. Naal, Emmanuel Simeu, Salvador Mir |
| 2003 | Synthesis of Low-Cost Parity-Based Partially Self-Checking Circuits. | Kartik Mohanram, Egor S. Sogomonyan, Michael Gssel, Nur A. Touba |
| 2003 | Designing FPGA based Self-Testing Checkers for m-out-of-n Codes. | Anzhela Yu. Matrosova, Vladimir Ostrovsky, Ilya Levin, K. Nikitin |
| 2003 | Automatic toolset for fault tolerant design: results demonstration on a running industrial application. | Alberto Manzone, Claudio Genta |
| 2003 | Evaluation of the Quality of Testing Path Delay Faults under Restricted Input Assumption. | Andrzej Krasniewski |
| 2003 | InTeRail: Using Existing and Extra Interconnects to Test Core-Based SOCs. | Dimitri Kagaris, Spyros Tragoudas |
| 2003 | Property Coverage for Quality Assessment of Fault Tolerant or Fail Safe Systems. | Fernando M. Gonalves, Marcelino B. Santos, Isabel C. Teixeira, Joo Paulo Teixeira |
| 2003 | An RT-level Concurrent Error Detection Technique for Data Dominated Systems. | Olga Goloubeva, Matteo Sonza Reorda, Massimo Violante |
| 2003 | Defect Analysis for Delay-Fault BIST in FPGAs. | Patrick Girard, Olivier Hron, Serge Pravossoudovitch, Michel Renovell |
| 2003 | Perspectives of Combining on-line and off-line Test Technology for Dependable Systems on a Chip. | Christian Galke, Marcus Grabow, Heinrich Theodor Vierhaus |