| 1999 | BIST for phase-locked loops in digital applications. | Stephen K. Sunter, Aubin Roy |
| 1999 | System design verification tests - an overview. | Susana Stoica |
| 1999 | Robust test methods applied to functional design verification. | Susana Stoica |
| 1999 | Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor. | Manfred Stadler, Thomas Rwer, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, Markus Thalmann |
| 1999 | Diagnostic techniques for the IBM S/390 600 MHz G5 microprocessor. | Peilin Song, Franco Motika, Daniel R. Knebel, Rick Rizzolo, Mary P. Kusko, Julie Lee, Moyra K. McManus |
| 1999 | Panel Statement: Increasing test coverage in a VLSI design course. | Mani Soma |
| 1999 | Testability evaluation of sequential designs incorporating the multi-mode scannable memory element. | Adit D. Singh, Egor S. Sogomonyan, Michael Gssel, Markus Seuring |
| 1999 | The test requirements model (TeRM) communicating test information throughout the product life cycle. | Lee A. Shombert, Danny C. Davis, Eric M. Bukata |
| 1999 | A DFT technique for high performance circuit testing. | Mansour Shashaani, Manoj Sachdev |
| 1999 | The effects of test compaction on fault diagnosis. | Yun Shao, Ruifeng Guo, Sudhakar M. Reddy, Irith Pomeranz |
| 1999 | An integrated approach to behavioral-level design-for-testability using value-range and variable testability techniques. | Sandhya Seshadri, Michael S. Hsiao |
| 1999 | Breaking the complexity spiral in board test. | Stephen F. Scheiber |
| 1999 | Resistive bridge fault modeling, simulation and test generation. | Vijay R. Sar-Dessai, D. M. H. Walker |
| 1999 | High level test bench generation using software engineering concepts. | Jean Franois Santucci, Christophe Paoli |
| 1999 | Silicon debug: scan chains alone are not enough. | Gert-Jan van Rootselaar, Bart Vermeulen |
| 1999 | Subband filtering scheme for analog and mixed-signal circuit testing. | Jeongjin Roh, Jacob A. Abraham |
| 1999 | High-level ATPG for Early Power Analysis. | Wolfgang Roethig |
| 1999 | Thin Gate Oxide Reliability. | Jeffrey L. Roehr |
| 1999 | DFT, test lifecycles and the product lifecycle. | Gordon D. Robinson |
| 1999 | Increasing test coverage in a VLSI design course. | Michel Robert |
| 1999 | Design of a test simulation environment for test program development. | J. J. O. Riordan |
| 1999 | High-level ATPG: a real topic or an academic amusement? | Matteo Sonza Reorda |
| 1999 | Optimal conditions for Boolean and current detection of floating gate faults. | Michel Renovell, Andr Ivanov, Yves Bertrand, Florence Azas, Sumbal Rafiq |
| 1999 | Application of Tools Developed at the University of Iowa to ITC Benchmarks. | Sudhakar M. Reddy |
| 1999 | Practical scan test generation and application for embedded FIFOs. | Jeff Rearick |