IEEE International Test Conference
ITC
A
CORE rank
CORE rank (raw)
A
Fields of research
Computer Systems Engineering
Papers indexed
4,920
1981–2025
Papers per year
1981207 peak2025
Most published authors
ITC papers
4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2019 | Machine Learning-Based Automatic Generation of eFuse Configuration in NAND Flash Chip. | Jisuk Kim, Jinyub Lee, Sungjoo Yoo |
| 2019 | Breaking Analog Locking Techniques via Satisfiability Modulo Theories. | Nithyashankari Gummidipoondi Jayasankaran, Adriana C. Sanabria-Borbon, Amr Abuellil, Edgar Snchez-Sinencio, Jiang Hu, Jeyavijayan Rajendran |
| 2019 | Asian Test Symposium - Past, Present and Future -. | Michiko Inoue, Xiaowei Li, Cheng-Wen Wu |
| 2019 | Subtle Anomaly Detection of Microscopic Probes using Deep learning based Image Completion. | Kosuke Ikeda, Keith Schaub, Ira Leventhal, Yiorgos Makris, Constantinos Xanthopoulos, Deepika Neethirajan |
| 2019 | A Jitter Injection Module for Production Test of 52-Gbps PAM4 Signal Interfaces. | Kiyotaka Ichiyama, Takashi Kusaka, Masahiro Ishida |
| 2019 | DARS: An EDA Framework for Reliability and Functional Safety Management of System-on-Chips. | Ahmed M. Y. Ibrahim, Hans G. Kerkhoff |
| 2019 | TestDNA: Novel Wafer Defect Signature for Diagnosis and Yield Learning. | Andrew Yi-Ann Huang, Katherine Shu-Min Li, Cheng-Yen Tsai, Ken Chau-Cheung Cheng, Sying-Jyan Wang, Xu-Hao Jiang, Leon Chou, Chen-Shiun Lee |
| 2019 | Variation-Aware Small Delay Fault Diagnosis on Compressed Test Responses. | Stefan Holst, Eric Schneider, Michael A. Kochte, Xiaoqing Wen, Hans-Joachim Wunderlich |
| 2019 | Time-Slicing Soft Error Resilience in Microprocessors for Reliable and Energy-Efficient Execution. | Yi He, Yanjing Li |
| 2019 | Advanced Burn-In - An Optimized Product Stress and Test Flow for Automotive Microcontrollers. | Chen He |
| 2019 | Testing Computation-in-Memory Architectures Based on Emerging Memories. | Said Hamdioui, Moritz Fieback, Surya Nagarajan, Mottaqiallah Taouil |
| 2019 | Testing of Neuromorphic Circuits: Structural vs Functional. | Anteneh Gebregiorgis, Mehdi Baradaran Tahoori |
| 2019 | Application of Cell-Aware Test on an Advanced 3nm CMOS Technology Library. | Zhan Gao, Santosh Malagi, Min-Chun Hu, Joe Swenton, Rogier Baert, Jos Huisken, Bilal Chehab, Kees Goossens, Erik Jan Marinissen |
| 2019 | IEEE International Symposium on Hardware Oriented Security and Trust (HOST): Past, Present, and Future. | Domenic Forte, Swarup Bhunia, Ramesh Karri, Jim Plusquellic, Mark Tehranipoor |
| 2019 | A Decentralized Scheduler for On-line Self-test Routines in Multi-core Automotive System-on-Chips. | Andrea Floridia, Davide Piumatti, Annachiara Ruospo, Ernesto Snchez, Sergio de Luca, Rosario Martorana |
| 2019 | Device-Aware Test: A New Test Approach Towards DPPB Level. | Moritz Fieback, Lizhou Wu, Guilherme Cardoso Medeiros, Hassen Aziza, Siddharth Rao, Erik Jan Marinissen, Mottaqiallah Taouil, Said Hamdioui |
| 2019 | SoC Security Verification using Property Checking. | Nusrat Farzana, Fahim Rahman, Mark Tehranipoor, Farimah Farahmandi |
| 2019 | IEEE International Conference on Automation, Quality and Testing, Robotics (AQTR). | Szilrd Enyedi, Liviu Miclea |
| 2019 | IEEE European Test Symposium (ETS). | Stephan Eggersgl, Said Hamdioui, Artur Jutman, Maria K. Michael, Jaan Raik, Matteo Sonza Reorda, Mehdi Baradaran Tahoori, Elena-Ioana Vatajelu |
| 2019 | Towards Complete Fault Coverage by Test Point Insertion using Optimization-SAT Techniques. | Stephan Eggersgl |
| 2019 | Characterization of Locked Combinational Circuits via ATPG. | Danielle Duvalsaint, Xiaoxiao Jin, Benjamin Niewenhuis, R. D. (Shawn) Blanton |
| 2019 | FPGA Bitstream Security: A Day in the Life. | Adam Duncan, Fahim Rahman, Andrew Lukefahr, Farimah Farahmandi, Mark Tehranipoor |
| 2019 | Applying Vstress and defect activation coverage to produce zero-defect mixed-signal automotive ICs. | Wim Dobbelaere, Frederik Colle, Anthony Coyette, Ronny Vanhooren, Nektar Xama, Jhon Gomez, Georges G. E. Gielen |
| 2019 | Simulation-based Equivalence Checking between IEEE 1687 ICL and RTL. | Aleksa Damljanovic, Artur Jutman, Michele Portolan, Ernesto Snchez, Giovanni Squillero, Anton Tsertov |
| 2019 | Overall Strategy for Online Clock System Checking Supporting Heterogeneous Integration. | Wei Chu, Shi-Yu Huang |
451–475 of 4,920← PreviousNext →
Comparable venues
Other A*/A conferences filed under the same field of research.
- ADATEDesign, Automation and Test in Europe Conference
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- A*ISCAACM International Symposium on Computer Architecture
- A*MICROInternational Symposium on Microarchitecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design
- AICSACM International Conference on Supercomputing