| 2018 | Total Critical Area Based Testing. | Friedrich Hapke, Peter C. Maxwell |
| 2018 | An Effective Methodology for Automated Diagnosis of Functional Pattern Failures to Support Silicon Debug. | Pallav Gupta |
| 2018 | Advanced ECC-Based FIT Rate Mitigation Technique for Automotive SoCs. | Hayk T. Grigoryan, Samvel K. Shoukourian, Gurgen Harutyunyan, Yervant Zorian, Costas Argyrides |
| 2018 | Safe AI for CPS (Invited Paper). | Nathan Fulton, Andr Platzer |
| 2018 | Testing Resistive Memories: Where are We and What is Missing? | Moritz Fieback, Mottaqiallah Taouil, Said Hamdioui |
| 2018 | Pre-silicon Formal Verification of JTAG Instruction Opcodes for Security. | Nicole Fern, Kwang-Ting (Tim) Cheng |
| 2018 | Polynomial Chaos modeling for jitter estimation in high-speed links. | Majid Ahadi Dolatsara, Huan Yu, Jose Ale Hejase, Wiren Dale Becker, Madhavan Swaminathan |
| 2018 | A PVT-Resilient No-Touch DFT Methodology for Prebond TSV Testing. | Sourav Das, Fei Su, Sreejit Chakravarty |
| 2018 | Improving Diagnosis Resolution and Performance at High Compression Ratios. | Sameer Chillarige, Atul Chhabra, Anil Malik, Bharath Nandakumar, Joe Swenton, Krishna Chakravadhanula |
| 2018 | Analysis of Process Variations, Defects, and Design-Induced Coupling in Memristors. | Arjun Chaudhuri, Krishnendu Chakrabarty |
| 2018 | Fast and accurate linearity test for DACs with various architectures using segmented models. | Shravan K. Chaganti, Abalhassan Sheikh, Sumit Dubey, Frank Ankapong, Nitin Agarwal, Degang Chen |
| 2018 | Case Study and Advanced Functional Safety Solution for Automotive SoCs. | M. Casarsa, Gurgen Harutyunyan |
| 2018 | A New Technique to Generate Test Sequences for Reconfigurable Scan Networks. | Riccardo Cantoro, Aleksa Damljanovic, Matteo Sonza Reorda, Giovanni Squillero |
| 2018 | Optimizing the Use of Simulations for Commissioning with Systems Engineering Principles and Objective Analysis. | Trevor Ault |
| 2018 | On the use of Bayesian Networks for Resource-Efficient Self-Calibration of Analog/RF ICs. | Martin Andraud, Laura Isabel Galindez Olascoaga, Yichuan Lu, Yiorgos Makris, Marian Verhelst |
| 2018 | Scalable Hardware Trojan Activation by Interleaving Concrete Simulation and Symbolic Execution. | Alif Ahmed, Farimah Farahmandi, Yousef Iskander, Prabhat Mishra |
| 2018 | Hypercompression of Test Patterns. | Yu Huang, Sylwester Milewski, Janusz Rajski, Jerzy Tyszer, Chen Wang |
| 2018 | TimingSAT: Decamouflaging Timing-based Logic Obfuscation. | Meng Li, Kaveh Shamsi, Yier Jin, David Z. Pan |
| 2017 | Accurate and robust spectral testing with relaxed instrumentation requirements. | Yuming Zhuang, Degang Chen |
| 2017 | Software-based online self-testing of network-on-chip using bounded model checking. | Ying Zhang, Krishnendu Chakrabarty, Huawei Li, Jianhui Jiang |
| 2017 | Accurate ADC testing with significantly relaxed instrumentation including large cumulative jitter. | Li Xu, Yuming Zhuang, Rajavelu Thinakaran, Kenneth M. Butler, Degang Chen |
| 2017 | Automated die inking: A pattern recognition-based approach. | Constantinos Xanthopoulos, Peter Sarson, Heinz Reiter, Yiorgos Makris |
| 2017 | Thwarting analog IC piracy via combinational locking. | Jiafan Wang, Congyin Shi, Adriana C. Sanabria-Borbon, Edgar Snchez-Sinencio, Jiang Hu |
| 2017 | Some considerations on choosing an outlier method for automotive product lines. | Li-C. Wang, Sebastian Siatkowski, Chuanhe Jay Shan, Matthew Nero, Nikolas Sumikawa, LeRoy Winemberg |
| 2017 | Test reordering for improved scan chain diagnosis using an enhanced defect diagnosis procedure. | Srikanth Venkataraman, Irith Pomeranz, Shraddha Bodhe, M. Enamul Amyeen |