| 2016 | Online slack-time binning for IO-registered die-to-die interconnects. | Chih-Chieh Zheng, Shi-Yu Huang, Shyue-Kung Lu, Ting-Chi Wang, Kun-Han Tsai, Wu-Tung Cheng |
| 2016 | Putting wasted clock cycles to use: Enhancing fortuitous cell-aware fault detection with scan shift capture. | Fanchen Zhang, Daphne Hwong, Yi Sun, Allison Garcia, Soha Alhelaly, Geoff Shofner, LeRoy Winemberg, Jennifer Dworak |
| 2016 | Upper-bound computation for optimal retargeting in IEEE1687 networks. | Farrokh Ghani Zadegan, Rene Krenz-Baath, Erik Larsson |
| 2016 | EMACS: Efficient MBIST architecture for test and characterization of STT-MRAM arrays. | Insik Yoon, Ashwin Chintaluri, Arijit Raychowdhury |
| 2016 | A unified test and fault-tolerant multicast solution for network-on-chip designs. | Dong Xiang, Krishnendu Chakrabarty, Hideo Fujiwara |
| 2016 | Transformation of multiple fault models to a unified model for ATPG efficiency enhancement. | Cheng-Hung Wu, Kuen-Jong Lee |
| 2016 | Testing of interposer-based 2.5D integrated circuits. | Ran Wang, Krishnendu Chakrabarty |
| 2016 | Cross-layer system reliability assessment framework for hardware faults. | Alessandro Vallero, Alessandro Savino, Gianfranco Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio Gonzlez, Maha Kooli, Alberto Bosio, Giorgio Di Natale |
| 2016 | A suite of IEEE 1687 benchmark networks. | Anton Tsertov, Artur Jutman, Sergei Devadze, Matteo Sonza Reorda, Erik Larsson, Farrokh Ghani Zadegan, Riccardo Cantoro, Mehrdad Montazeri, Rene Krenz-Baath |
| 2016 | Securing digital microfluidic biochips by randomizing checkpoints. | Jack Tang, Ramesh Karri, Mohamed Ibrahim, Krishnendu Chakrabarty |
| 2016 | Automated measurement of defect tolerance in mixed-signal ICs. | Stephen Sunter, Alessandro Valerio, Riccardo Miglierina |
| 2016 | Statistical outlier screening as a test solution health monitor. | David Shaw, Dirk Hoops, Kenneth M. Butler, Amit Nahar |
| 2016 | Fault simulation for analog test coverage. | Jyotsna Sequeira, Suriyaprakash Natarajan, Prashant Goteti, Nitin Chaudhary |
| 2016 | Test time efficient group delay filter characterization technique using a discrete chirped excitation signal. | Peter Sarson |
| 2016 | Using symbolic canceling to improve diagnosis from compacted response. | Kamran Saleem, Nur A. Touba |
| 2016 | BIST-RM: BIST-assisted reliability management of SoCs using on-chip clock sweeping and machine learning. | Mehdi Sadi, Gustavo K. Contreras, Dat Tran, Jifeng Chen, LeRoy Winemberg, Mark Tehranipoor |
| 2016 | Keynote address Wednesday: Hardware inference accelerators for machine learning. | Rob A. Rutenbar |
| 2016 | Mixed-signal ATE technology and its impact on today's electronic system. | Gordon W. Roberts |
| 2016 | Plenary keynote address Tuesday: The business of test: Test and semiconductor economics. | Walden C. Rhines |
| 2016 | Accessing 1687 systems using arbitrary protocols. | Michele Portolan |
| 2016 | Memory repair for high fault rates. | Panagiota Papavramidou |
| 2016 | Pylon: Towards an integrated customizable volume diagnosis infrastructure. | Yan Pan, Rao Desineni, Kannan Sekar, Atul Chittora, Sherwin Fernandes, Neerja Bawaskar, John M. Carulli |
| 2016 | Power supply impedance emulation to eliminate overkills and underkills due to the impedance difference between ATE and customer board. | Toru Nakura, Naoki Terao, Masahiro Ishida, Rimon Ikeno, Takashi Kusaka, Tetsuya Iizuka, Kunihiro Asada |
| 2016 | Novel crosstalk evaluation method for high-density signal traces using clock waveform conversion technique. | Takayuki Nakamura, Koji Asami |
| 2016 | I-Q signal generation techniques for communication IC testing and ATE systems. | Masahiro Murakami, Haruo Kobayashi, Shaiful Nizam Bin Mohyar, Osamu Kobayashi, Takahiro Miki, Junya Kojima |