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IEEE International Test Conference

ITC

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

4,920

1981–2025

Papers per year

1981207 peak2025

ITC papers

4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2016DE-LOC: Design validation and debugging under limited observation and control, pre- and post-silicon for mixed-signal systems.Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee
2016Test point insertion in hybrid test compression/LBIST architectures.Elham K. Moghaddam, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, Justyna Zawada
2016Test chip design for optimal cell-aware diagnosability.Soumya Mittal, Zeye Liu, Ben Niewenhuis, R. D. (Shawn) Blanton
2016Minimal area test points for deterministic patterns.Yingdi Liu, Elham K. Moghaddam, Nilanjan Mukherjee, Sudhakar M. Reddy, Janusz Rajski, Jerzy Tyszer
2016Diagnostic resolution improvement through learning-guided physical failure analysis.Carlston Lim, Yang Xue, Xin Li, Ronald D. Blanton, M. Enamul Amyeen
2016Built-in self-test for micro-electrode-dot-array digital microfluidic biochips.Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee
2016Defect tolerance for CNFET-based SRAMs.Tianjian Li, Li Jiang, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty
2016Output bit selection methodology for test response compaction.Wei-Cheng Lien, Kuen-Jong Lee
2016An on-chip self-test architecture with test patterns recorded in scan chains.Kuen-Jong Lee, Pin-Hao Tang, Michael A. Kochte
2016Handling wrong mapping: A new direction towards better diagnosis with low pin convolution compressors.Subhadip Kundu, Parthajit Bhattacharya, Rohit Kapur
2016Machine learning-based defense against process-aware attacks on Industrial Control Systems.Anastasis Keliris, Hossein Salehghaffari, Brian R. Cairl, Prashanth Krishnamurthy, Michail Maniatakos, Farshad Khorrami
2016Supply-voltage optimization to account for process variations in high-volume manufacturing testing.Gurunath Kadam, Markus Rudack, Krishnendu Chakrabarty, Juergen Alt
2016Active reliability monitor: Defect level extrinsic reliability monitoring on 22nm POWER8 and zSeries processors.Michael Johnson, Brian Noble, Mark Johnson, Jim Crafts, Cynthia Manya, John Deforge
2016Accurate anomaly detection using correlation-based time-series analysis in a core router system.Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu
2016Advanced test methodology for complex SoCs.Pavan Kumar Datla Jagannadha, Mahmut Yilmaz, Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Bonita Bhaskaran, Ayub Abdollahian
2016Variation and failure characterization through pattern classification of test data from multiple test stages.Chun-Kai Hsu, Peter Sarson, Gregor Schatzberger, Friedrich Peter Leisenberger, John M. Carulli Jr., Siddhartha Siddhartha, Kwang-Ting Cheng
2016A built-in self-repair scheme for DRAMs with spare rows, columns, and bits.Chih-Sheng Hou, Yong-Xiao Chen, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou
2016Keynote address Thursday: Addressing semiconductor industry needs: Defining the future through creative, exciting research.Ken Hansen
2016Logic characterization vehicle design reflection via layout rewiring.Phillip Fynan, Zeye Liu, Benjamin Niewenhuis, Soumya Mittal, Marcin Strajwas, R. D. (Shawn) Blanton
2016RF test accuracy and capacity enhancement on ATE for silicon TV tuners.Y. Fan, A. Verma, Y. Su, L. Rose, J. Janney, V. Do, S. Kumar
2016Effective DC fault models and testing approach for open defects in analog circuits.Baris Esen, Anthony Coyette, Georges G. E. Gielen, Wim Dobbelaere, Ronny Vanhooren
2016Analog fault coverage improvement using final-test dynamic part average testing.Wim Dobbelaere, Ronny Vanhooren, Willy De Man, Koen Matthijs, Anthony Coyette, Baris Esen, Georges G. E. Gielen
2016A reconfigurable built-in memory self-repair architecture for heterogeneous cores with embedded BIST datapath.V. R. Devanathan, Sumant Kale
2016Automatic test signal generation for mixed-signal integrated circuits using circuit partitioning and interval analysis.Anthony Coyette, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen
2016An accurate algorithm for computing mutation coverage in model checking.Huina Chao, Huawei Li, Tiancheng Wang, Xiaowei Li, Bo Liu
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