| 2015 | Design reflection for optimal test-chip implementation. | R. D. (Shawn) Blanton, Benjamin Niewenhuis, Zeye (Dexter) Liu |
| 2015 | PiRA: IC authentication utilizing intrinsic variations in pin resistance. | Abhishek Basak, Fengchao Zhang, Swarup Bhunia |
| 2015 | Secure design-for-debug for Systems-on-Chip. | Jerry Backer, David Hly, Ramesh Karri |
| 2015 | Brain-inspired computing. | Karim Arabi |
| 2015 | Embedded deterministic test points for compact cell-aware tests. | Cesar Acero, Derek Feltham, Friedrich Hapke, Elham K. Moghaddam, Nilanjan Mukherjee, Vidya Neerkundar, Marek Patyra, Janusz Rajski, Jerzy Tyszer, Justyna Zawada |
| 2014 | Design, test & repair methodology for FinFET-based memories. | Yervant Zorian |
| 2014 | Bayesian model fusion: Enabling test cost reduction of analog/RF circuits via wafer-level spatial variation modeling. | Shanghang Zhang, Xin Li, Ronald D. Blanton, Jos Machado da Silva, John M. Carulli Jr., Kenneth M. Butler |
| 2014 | Robustness of TAP-based scan networks. | Farrokh Ghani Zadegan, Gunnar Carlsson, Erik Larsson |
| 2014 | Knowledge discovery and knowledge transfer in board-level functional fault diagnosis. | Fangming Ye, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu |
| 2014 | Design, technology and yield in the post-moore era. | Greg Yeric |
| 2014 | Fast co-test of linearity and spectral performance with non-coherent sampled and amplitude clipped data. | Li Xu, Degang Chen |
| 2014 | IC laser trimming speed-up through wafer-level spatial correlation modeling. | Constantinos Xanthopoulos, Ke Huang, Abbas Poonawala, Amit Nahar, Bob Orr, John M. Carulli Jr., Yiorgos Makris |
| 2014 | Achieving extreme scan compression for SoC Designs. | Peter Wohl, John A. Waicukauski, Jonathon E. Colburn, Milind Sonawane |
| 2014 | A self-tuning architecture for buck converters based on alternative test. | Xian Wang, Blanchard Kenfack, Estella Silva, Abhijit Chatterjee |
| 2014 | Software in a hardware view: New models for HW-dependent software in SoC verification and test. | Carlos Villarraga, Bernard Schmidt, Binghao Bao, Rakesh Raman, Christian Bartsch, Thomas Fehmel, Dominik Stoffel, Wolfgang Kunz |
| 2014 | Dynamic microgrids - A potential solution for enhanced resiliency in distribution systems. | Mani Vadari |
| 2014 | Low cost back end signal processing driven bandwidth interleaved signal acquisition using free running undersampling clocks and mixing signals. | Nicholas Tzou, Debesh Bhatta, Abhijit Chatterjee |
| 2014 | Security solutions in the first-generation Zynq All-Programmable SoC. | Steve Trimberger |
| 2014 | Yield optimization using advanced statistical correlation methods. | Jeff Tikkanen, Sebastian Siatkowski, Nik Sumikawa, Li-C. Wang, Magdy S. Abadir |
| 2014 | Managing signal, power and thermal integrity for 3D integration. | Madhavan Swaminathan |
| 2014 | Fast BIST of I/O Pin AC specifications and inter-chip delays. | Stephen Sunter, Saghir A. Shaikh, Qing Lin |
| 2014 | Practical random sampling of potential defects for analog fault simulation. | Stephen Sunter, Krzysztof Jurga, Peter Dingenen, Ronny Vanhooren |
| 2014 | Counterfeit IC detection using light emission. | Peilin Song, Franco Stellari, Alan J. Weger |
| 2014 | Analog fault models: Back to the future? | Mani Soma |
| 2014 | Collaboration and teamwork obstacles. | Wesley Smith |