| 2014 | Board manufacturing test correlation to IC manufacturing test. | C. Glenn Shirley, W. Robert Daasch, Phil Nigh, Zoe Conroy |
| 2014 | On-chip constrained random stimuli generation for post-silicon validation using compact masks. | Xiaobing Shi, Nicola Nicolici |
| 2014 | At-speed capture power reduction using layout-aware granular clock gate enable controls. | Raashid Shaikh, Pradeep Wilson, Khushboo Agarwal, H. V. Sanjay, Rajesh Tiwari, Kaushik Lath, Srivaths Ravi |
| 2014 | Mitigating voltage droop during scan with variable shift frequency. | John Schulze, Ryan Tally |
| 2014 | A tale of two lives: Under test and in the wild. | Bianca Schroeder |
| 2014 | Microgrids as a resiliency resource. | Kevin Schneider |
| 2014 | Test-mode-only scan attack and countermeasure for contemporary scan architectures. | Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu, Ramesh Karri |
| 2014 | DfST: Design for secure testability. | Samah Mohamed Saeed |
| 2014 | Process defect trends and strategic test gaps. | Paul G. Ryan, Irfan Aziz, William B. Howell, Teresa K. Janczak, Davia J. Lu |
| 2014 | ATE and test equipment vendors; Hardware not software. | Mark Roos |
| 2014 | Analytical MRAM test. | Raphael Robertazzi, Janusz Nowak, Jonathan Sun |
| 2014 | A test probe for TSV using resonant inductive coupling. | Rashid Rashidzadeh, Iftekhar Ibne Basith |
| 2014 | A reusable BIST with software assisted repair technology for improved memory and IO debug, validation and test time. | Bruce Querbach, Rahul Khanna, David Blankenbeckler, Yulan Zhang, Ronald T. Anderson, David G. Ellis, Zale T. Schoenborn, Sabyasachi Deyati, Patrick Chiang |
| 2014 | Welcome message. | Michael Purtell, Subhasish Mitra |
| 2014 | A diagnosis-friendly LBIST architecture with property checking. | Sarvesh Prabhu, Vineeth V. Acharya, Sharad Bagri, Michael S. Hsiao |
| 2014 | Clustering-based failure triage for RTL regression debugging. | Zissis Poulos, Andreas G. Veneris |
| 2014 | Intra-die process variation aware anomaly detection in FPGAs. | Youngok K. Pino, Vinayaka Jyothi, Matthew French |
| 2014 | A novel RF self test for a combo SoC on digital ATE with multi-site applications. | Chun-Hsien Peng, ChiaYu Yang, Adonis Tsu, Chung-Jin Tsai, Yosen Chen, C.-Y. Lin, Kai Hong, Kaipon Kao, Paul C. P. Liang, Chao Long Tsai, Charles Chien, H. C. Hwang |
| 2014 | A built-in self-test circuit for jitter tolerance measurement in high-speed wireline receivers. | Myeong-Jae Park, Jaeha Kim |
| 2014 | Challenges of testing 100M chips. | Sajjad Pagarkar |
| 2014 | Improving test compression with scan feedforward techniques. | Sreenivaas S. Muthyala, Nur A. Touba |
| 2014 | Top ten challenges in Big Data security and privacy. | Praveen K. Murthy |
| 2014 | Teaching an old dog new tricks: Views on the future of mixed-signal IC design. | Boris Murmann |
| 2014 | Systematic approach for trim test time optimization: Case study on a multi-core RF SOC. | Rajesh Mittal, Mudasir Kawoosa, Rubin A. Parekhji |
| 2014 | EAGLE: A regression model for fault coverage estimation using a simulation based metric. | Shahrzad Mirkhani, Jacob A. Abraham |