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IEEE International Test Conference

ITC

A

CORE rank

CORE rank (raw)

A

Fields of research

Computer Systems Engineering

Papers indexed

4,920

1981–2025

Papers per year

1981207 peak2025

ITC papers

4,920 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2025CP-Bench: A PyTorch Test Suite to Detect AI Hardware Failure, Performance Degradation, and Silent Data Corruption.Xun Jiao, Sunny Yang, Suman Gumudavelli, Shreya Varshini, Abhinav Pandey, Abhinav Jauhri, Francesco Caggioni, Gautham Vunnam, Harish Dattatraya Dixit, Jason Liang, Philip Henzler, Sameeksha Gupta, Tyler Graf, Venkat Ramesh, Fan Fred Lin
2025Deep Learning-based IC Monitoring.Iresh M. Jayawardana, Krishna Dahal, Spyros Tragoudas, Khader S. Abdel-Hafez, Danushka Senarathna
2025A Novel Omnidirectional 3D Test Access Architecture for Advanced System-on-Wafer (SoW) Applications.Hiroyuki Iwata, Sandeep Kumar Goel, Ankita Patidar, Fumiaki Takashima, Frank Lee
2025Push-on mating 57- to 81- GHz mm-Wave interface with high repeatability for ATE application.Minoru Iida, Norio Kobayashi, Hideki Shirasu, Masayuki Nakamura
2025Holistic Validation Pattern Generation for IEEE 1687 and Streaming Scan Networks.Sebastian Huhn, Matthias Kampmann, Jan Burchard, Reinhard Meier, Kacper Czerniawski, Lori Schramm, Sandipan Sharma, Nikita Naresh, Wilson Pradeep, Prachi Sinha, Mayank Parasrampuria, Jonathan Gaudet, Martin Keim
2025Wafer Map Pattern Recognition for Multisite Probe with Synthetic Data Augmented Training.Chen He, Rebecca Chen, Patrick Goertz
2025Scan Chain Diagnosis in Advanced Process Nodes: The Art of Balancing Resolution, Repairability, and Cost.Sandeep Kumar Goel, Ankita Patidar, Yue Tian, Frank Lee
2025Leveraging UCIe Interface for Silicon Health & Reliabiilty of Chiplets in a 3D Stack.Sandeep Kumar Goel, Ankita Patidar, Stanley John, Frank Lee, Min-Jer Wang, Daniel F. J. Yang, Yervant Zorian, Manish Arora, Firooz Massoudi, Shaan Awasthi, Stelios Balalis, Velmurugan Pathervellaichamy, Bharath Shankaranarayanan, Narasimhalu Raju, Gurgen Harutyunyan, Grigor Tshagharyan, Vahagn Hovakimyan, Arman Karagyozyan, Alvina Manucharyan
2025Test Pattern Aware Streaming Fabric-based Scan Test Methodology.Krishna Prasad Gnawali, Andrea Costa, Nathalie Etono, Denis Martin, Bala Tarun Nelapatla, Amit Purohit
2025A Novel Tester-Based Approach for Functional Testing of Hardware Timers.Nicola Di Gruttola Giardino
2025An SMT-Based Method for Identifying State-Holding Elements in Extracted Netlists.Aric Fowler, Carl Sechen, Yiorgos Makris
2025FSWGEN: a Device-tree Specification driven System-Level Test workload generator.Gabriele Filipponi
2025Power Side-Channel Vulnerabilities of a RISC-V Cryptography Accelerator Integrated into CVA6 via Core-V eXtension Interface (CV-X-IF).Behnam Farnaghinejad, Davide Bellizia, Alessandra Dolmeta, Guido Masera, Antonio Porsia, Annachiara Ruospo, Stefano Di Carlo, Alessandro Savino, Ernesto Snchez
2025Scan Strategies for High Quality Latch Array Testing.Bin Du, Nehal Patel, Yerong Chen, Jeremy Chin, Katherine Tian
2025LLM-Aided In-Field Workload Generation for Detecting Silent Data Corruptions at Scale.Peter Domanski, Deepesh Sahoo, Eduardo Ortega, Farshad Firouzi, Krishnendu Chakrabarty
2025Efficient Delay Fault Characterization of Resistive Open Defects in Standard Cells Using Resistive Fault Dominance.Gowsika Dharmaraj, Abhijit Chatterjee, Adit D. Singh, Arani Sinha
2025Ultra-Pure High-Resolution Waveform Generation Using Low-Cost Data Converters with Dithering.Emmanuel Nti Darko, Saeid Karimpour, Ekaniyere Oko-Odion, Godfred Bonsu, Degang Chen
2025Hybrid Static Learning for ATPG.Jonathon E. Colburn, Peter Wohl, John A. Waicukauski, Yasunari Kanzawa
2025Small Delay Defect Diagnosis via Timing-Aware Fault Simulation with Variant Delay Insertion.Cheng-En Chung, Jun-Han Jian, Kuen-Jong Lee, Nan-Hsin Tseng, Hsin-Wei Hung, Hao-Yu Yang, Dong-Yi Chen
2025Chiplet Interconnect Test and Repair.Po-Yao Chuang, Cheng-Wen Wu, Erik Jan Marinissen
2025Chiplets' Die-to-Die Interconnect Repair Language (IRL).Po-Yao Chuang, Erik Jan Marinissen
2025Test and Calibration Methods for Process Variation of ReRAM-based Spiking Neural Networks.Po-Sheng Chiu, Chih-Yu Hsu, Chih-Tsun Huang, Jing-Jia Liou
2025Embedded Trace: A Key Enabler for Silicon Lifecycle Management.Vivek Chickermane, Marcel Zak, Mat O'Donnell
2025Embedded Trace: A Key Enabler for Silicon Lifecycle Management.Vivek Chickermane, Marcel Zak, Mat O'Donnell
2025Using Distinguishing Bits to Improve Chain Diagnosis Coverage for Silicon Defects.Wu-Tung Cheng, Manish Sharma, Artur Stelmach, Jakub Janicki, Preston McWithey, Gaurav Veda, Szczepan Urban, Jayant D'Souza
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