| 2001 | Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures. | Kanishka Lahiri, Sujit Dey, Anand Raghunathan |
| 2001 | Power-aware Multimedia Systems using Run-time Prediction. | Pavan Kumar, Mani B. Srivastava |
| 2001 | Timing Verification and Delay Test Generation for Hierarchical Designs. | Arun Krishnamachary, Jacob A. Abraham, Raghuram S. Tupuri |
| 2001 | Combinational Test Generation for Acyclic SequentialCircuits using a Balanced ATPG Model. | Yong Chang Kim, Kewal K. Saluja, Vishwani D. Agrawal |
| 2001 | Embedded Memories in System Design: Technology, Application, Design and Tools. | Doris Keitel-Schulz, Norbert Wehn, Francky Catthoor, Preeti Ranjan Panda |
| 2001 | Next Generation Network Processors. | Deepak Kataria |
| 2001 | IBM's Blue Logic Design Methodology-Circuits and Physical Design. | Ruchira Kamdar, Seetharam Gundurao, Rajiv V. Joshi, N. S. Murty |
| 2001 | Design Of Provably Correct Storage Arrays. | Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann |
| 2001 | Degradation Of Nmosfets During High-Field Injection With Reverse Biased Voltage At Source And Drain Junctions. | R. K. Jarwal, Durga Misra |
| 2001 | ASIP Design Methodologies : Survey and Issues. | Manoj Kumar Jain, M. Balakrishnan, Anshul Kumar |
| 2001 | A Parallel Built-In Self-Diagnostic Method For Embedded Memory Buffers. | Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das |
| 2001 | An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers. | Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das |
| 2001 | How to Half Wire Lengths in the Layout of Cyclic Shifter. | Mark A. Hillebrand, Thomas Schurger, Peter-Michael Seidel |
| 2001 | An Integrated Quadrature Mixer with Improved Image Rejection at Low Voltage. | Jackson Harvey, Ramesh Harjani |
| 2001 | Tutorial: CMOS Analog Circuits for Wireless Communications. | Ramesh Harjani, Jackson Harvey |
| 2001 | Fpga Hardware Synthesis From Matlab. | Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee, U. Nagaraj Shenoy |
| 2001 | Performance Considerations in Embedded DSP based System-On-a-Chip Designs. | Ajit Gupte, Mahesh Mehendale, Ramesh Ramamritham, Deepa Nair |
| 2001 | Synthesizing A Long Latency Unit Within Vliw Processor. | Ram Lakhan Gupta, Anshul Kumar, Albert van der Werf, Natalino G. Bus |
| 2001 | On Improving Static Test Compaction for Sequential Circuits. | Ruifeng Guo, Irith Pomeranz, Sudhakar M. Reddy |
| 2001 | Performance Driven Optimization for MUX based FPGAs. | Wolfgang Gnther, Rolf Drechsler |
| 2001 | Implementation of Read- k-times BDDs on Top of Standard BDD Packages. | Wolfgang Gnther, Rolf Drechsler |
| 2001 | Library Binding for High-Level Synthesis of Analog Systems. | Sree Ganesan, Ranga Vemuri |
| 2001 | Scaling Up Of Wave Pipelines. | Masa-Aki Fukase, Ryusuke Egawa, Tomoaki Sato, Tadao Nakamura |
| 2001 | Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. | David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir |
| 2001 | Error Diagnosis of Sequential Circuits Using Region-Based Mode. | Anand L. D'Souza, Michael S. Hsiao |