IEEE VLSI Test Symposium
VTS
National
CORE rank
CORE rank (raw)
National/Regional
Fields of research
Computer Systems Engineering
Papers indexed
2,208
1991–2026
Papers per year
199189 peak2026
Most published authors
VTS papers
2,208 records sourced from DBLP. Search titles, filter by year, sort by recency.
| Year | Title | Authors |
|---|---|---|
| 2017 | Flip-flop clustering based trace signal selection for post-silicon debug. | Yun Cheng, Huawei Li, Ying Wang, Yingke Gao, Bo Liu, Xiaowei Li |
| 2017 | Performance-aware reliability assessment of heterogeneous chips. | Athanasios Chatzidimitriou, Manolis Kaliorakis, Sotiris Tselonis, Dimitris Gizopoulos |
| 2017 | A low-cost method for separation and accurate estimation of ADC noise, aperture jitter, and clock jitter. | Shravan K. Chaganti, Li Xu, Degang Chen |
| 2017 | Efficient SAT-based generation of hazard-activated TSOF tests. | Jan Burchard, Dominik Erb, Sudhakar M. Reddy, Adit D. Singh, Bernd Becker |
| 2017 | At-speed capture global noise reduction & low-power memory test architecture. | Bonita Bhaskaran, Sailendra Chadalavada, Shantanu Sarangi, Nithin Valentine, Venkat Abilash Reddy Nerallapally, Ayub Abdollahian |
| 2017 | Keynote address: Opening keynote. | Ahmad Bahai |
| 2016 | Process variation oriented delay testing of SRAMs. | Xuan Zuo, Sandeep K. Gupta |
| 2016 | Accurate linearity testing with impure sinusoidal stimulus robust against flicker noise. | Yuming Zhuang, Tao Chen, Shravan K. Chaganti, Degang Chen |
| 2016 | Accurate spectral testing with non-coherent sampling for large distortion to noise ratios. | Yuming Zhuang, Degang Chen |
| 2016 | Path constraint solving based test generation for observability-enhanced branch coverage. | Yanhong Zhou, Huawei Li, Tiancheng Wang, Bo Liu, Yingke Gao, Xiaowei Li |
| 2016 | SRAM yield-per-area optimization under spatially-correlated process variation. | Jizhe Zhang, Sandeep K. Gupta |
| 2016 | Using hardware testing approaches to improve software testing: Undetectable mutant identification. | Jianwei Zhang, Sandeep K. Gupta |
| 2016 | Fault tolerance of approximate compute algorithms. | Hans-Joachim Wunderlich, Claus Braun, Alexander Schll |
| 2016 | A programmable method for low-power scan shift in SoC integrated circuits. | Ran Wang, Bonita Bhaskaran, Karthikeyan Natarajan, Ayub Abdollahian, Kaushik Narayanun, Krishnendu Chakrabarty, Amit Sanghani |
| 2016 | On-die learning-based self-calibration of analog/RF ICs. | Georgios Volanis, Dzmitry Maliuk, Yichuan Lu, Kiruba S. Subramani, Angelos Antonopoulos, Yiorgos Makris |
| 2016 | Online soft-error vulnerability estimation for memory arrays. | Arunkumar Vijayan, Abhishek Koneru, Mojtaba Ebrahimi, Krishnendu Chakrabarty, Mehdi Baradaran Tahoori |
| 2016 | Security primitives (PUF and TRNG) with STT-MRAM. | Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto |
| 2016 | Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level. | Sotiris Tselonis, Manolis Kaliorakis, Nikos Foutris, George Papadimitriou, Dimitris Gizopoulos |
| 2016 | Predicting Vt mean and variance from parallel Id measurement with model-fitting technique. | Chih-Ying Tsai, Kao-Chi Lee, Chien-Hsueh Lin, Sung-Chu Yu, Wen-Rong Liau, Alex Chun-Liang Hou, Ying-Yen Chen, Chun-Yi Kuo, Jih-Nung Lee, Mango C.-T. Chao |
| 2016 | Test implications and challenges in near threshold computing special session. | Mehdi Baradaran Tahoori, Rob Aitken, Sriram R. Vangal, Bal Sandhu |
| 2016 | Keynote address: Challenges and opportunities in electrical characterization and test for 14nm and below. | Andrzej J. Strojwas, Jacob A. Abraham, Hong Hao, Max M. Shulaker |
| 2016 | Revealing SRAM memory content using spontaneous photon emission. | Franco Stellari, Peilin Song, Manuel Villalobos, John Sylvestri |
| 2016 | Dynamic docking architecture for concurrent testing and peak power reduction. | Milind Sonawane, Pavan Kumar Datla Jagannadha, Sailendra Chadalavada, Shantanu Sarangi, Mahmut Yilmaz, Amit Sanghani, Karthikeyan Natarajan, Jonathon E. Colburn, Anubhav Sinha |
| 2016 | Flexible scan interface architecture for complex SoCs. | Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Amit Sanghani, Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Jonathon E. Colburn |
| 2016 | Consistency in wafer based outlier screening. | Sebastian Siatkowski, Chuanhe Jay Shan, Li-C. Wang, Nikolas Sumikawa, W. Robert Daasch, John M. Carulli |
526–550 of 2,208← PreviousNext →
Comparable venues
Other A*/A conferences filed under the same field of research.
- ADATEDesign, Automation and Test in Europe Conference
- A*DACDesign Automation Conf
- ASCInternational Conference for High Performance Computing, Networking, Storage and Analysis (was Supercomputing Conference)
- AICCADIEEE/ACM International Conference on Computer-Aided Design
- AITCIEEE International Test Conference
- A*ISCAACM International Symposium on Computer Architecture
- A*MICROInternational Symposium on Microarchitecture
- AISLPEDIEEE/ACM International Symposium on Low Power Electronics and Design