| 2012 | Cost modeling and analysis for interposer-based three-dimensional IC. | Ying-Wen Chou, Po-Yuan Chen, Mincent Lee, Cheng-Wen Wu |
| 2012 | Test cost optimization technique for the pre-bond test of 3D ICs. | Yong-Xiao Chen, Yu-Jen Huang, Jin-Fu Li |
| 2012 | Silicon evaluation of faster than at-speed transition delay tests. | Sreejit Chakravarty, Narendra Devta-Prasanna, Arun Gunda, Junxia Ma, Fan Yang, H. Guo, R. Lai, D. Li |
| 2012 | HBIST: An approach towards zero external test cost. | Mayur Bubna, Kaushik Roy, Ashish Goel |
| 2012 | Advanced test methods for SRAMs. | Alberto Bosio, Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel |
| 2012 | Smart selection of indirect parameters for DC-based alternate RF IC testing. | Haithem Ayari, Florence Azas, Serge Bernard, Mariane Comte, Michel Renovell, Vincent Kerzerho, Olivier Potin, Christophe Kelma |
| 2012 | An on-chip NBTI monitor for estimating analog circuit degradation. | Syed Askari, Mehrdad Nourani, Mini Rawat |
| 2012 | Delay test resource allocation and scheduling for multiple frequency domains. | Baris Arslan, Alex Orailoglu |
| 2012 | Analog/RF test ordering in the early stages of production testing. | Nourredine Akkouche, Salvador Mir, Emmanuel Simeu, Mustapha Slamani |
| 2011 | Power-safe test application using an effective gating approach considering current limits. | Wei Zhao, Mohammad Tehranipoor, Sreejit Chakravarty |
| 2011 | Localization of damaged resources in NoC based shared-memory MP2SOC, using a Distributed Cooperative Configuration Infrastructure. | Zhen Zhang, Dimitri Refauvelet, Alain Greiner, Mounir Benabdenbi, Franois Pcheux |
| 2011 | An industrial case study of analog fault modeling. | Ender Yilmaz, Anne Meixner, Sule Ozev |
| 2011 | Special session: Hot topic design and test of 3D and emerging memories. | Cheng-Wen Wu |
| 2011 | Special session: Hot topic: Smart silicon. | LeRoy Winemberg, Mohammad Tehranipoor |
| 2011 | Calibrated high-efficiency testing and modelling methodologies for concentrated multi-junction solar cells. | Jeffrey F. Wheeldon |
| 2011 | Special session 5B: Panel How much toggle activity should we be testing with? | Xiaoqing Wen, Mohammad Tehranipoor, Rohit Kapur, Anand Bhat, Amitava Majumdar, LeRoy Winemberg |
| 2011 | Power-aware test generation with guaranteed launch safety for at-speed scan testing. | Xiaoqing Wen, Kazunari Enokimoto, Kohei Miyase, Yuta Yamato, Michael A. Kochte, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor |
| 2011 | Structural tests of slave clock gating in low-power flip-flop. | Baosheng Wang, Jayalakshmi Rajaraman, Kanwaldeep Sobti, Derrick Losli, Jeff Rearick |
| 2011 | An efficient method to screen resistive opens under presence of process variation. | Seongmoon Wang |
| 2011 | Coverage closure in SoC verification: Are we chasing a mirage? | Shobha Vasudevan |
| 2011 | SLIDER: A fast and accurate defect simulation framework. | Wing Chiu Tam, Ronald D. Blanton |
| 2011 | Multi Domain Test: Novel test strategy to reduce the Cost of Test. | Yasuhiro Takahashi, Akinori Maeda |
| 2011 | Understanding customer returns from a test perspective. | Nik Sumikawa, Dragoljub Gagi Drmanac, Li-C. Wang, LeRoy Winemberg, Magdy S. Abadir |
| 2011 | The bang for the buck with resiliency: Yield or field? | Arani Sinha, Suriyaprakash Natarajan |
| 2011 | Exploiting rotational symmetries for improved stacked yields in W2W 3D-SICs. | Eshan Singh |